Untitled
Abstract: No abstract text available
Text: CY7C1062G CY7C1062GE PRELIMINARY 16-Mbit 512 K words x 32 bits Static RAM with Error-Correcting Code (ECC) 16-Mbit (512 K words × 32 bits) Static RAM with Error-Correcting Code (ECC) Features • High speed ❐ tAA = 10 ns ■ Embedded error-correcting code (ECC) for single-bit error
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CY7C1062G
CY7C1062GE
16-Mbit
119-ball
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Untitled
Abstract: No abstract text available
Text: CY7C1069G CY7C1069GE PRELIMINARY 16-Mbit 2 M words x 8 bit Static RAM with Error-Correcting Code (ECC) 16-Mbit (2 M words × 8 bit) Static RAM with Error-Correcting Code (ECC) Features an error indication pin (ERR) that signals the host processor in the case of an ECC error-detection and correction event.
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CY7C1069G
CY7C1069GE
16-Mbit
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AT91SAM
Abstract: atmel BCH codes 257975,BOSE atmel 418
Text: Features • Multibit Error Correcting Code • Algorithm based on binary shortened Bose, Chaudhuri and Hocquenghem BCH codes Programmable Error Correcting Capability: 2, 4, 8, 12 and 24 bit of errors per sector Programmable Sector Size: 512 bytes or 1024 bytes.
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32-bit
11038AS
26-Jan-10
AT91SAM
atmel
BCH codes
257975,BOSE
atmel 418
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY CY7C1061G/CY7C1061GE 16-Mbit 1 M words x 16 bit Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 bit) Static RAM with Error-Correcting Code (ECC) Features To access devices with a single chip enable input, assert the chip
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CY7C1061G/CY7C1061GE
16-Mbit
ns/15
90-mA
20-mA
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY CY7C1061G/CY7C1061GE 16-Mbit 1 M words x 16 bit Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 bit) Static RAM with Error-Correcting Code (ECC) Features To access devices with a single chip enable input, assert the chip
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CY7C1061G/CY7C1061GE
16-Mbit
ns/15
90-mA
20-mA
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Untitled
Abstract: No abstract text available
Text: CY62168G PRELIMINARY CY62168GE MoBL 16-Mbit 2 M words x 8 bits Static RAM with Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 bit / 2 M words × 8 bit) Static RAM with Error-Correcting Code (ECC) Features • Ultra-low standby power ❐ Typical standby current: 3.2 A
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CY62168G
CY62168GE
16-Mbit
48-ball
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CY7S1061G
Abstract: No abstract text available
Text: PRELIMINARY CY7S1061G, CY7S1061GE 16-Mbit 1 M words x 16 bit Static RAM with Deep-Sleep Feature and Error-Correcting Code (ECC) 16-Mbit (1 M words × 16 bit) Static RAM with Deep-Sleep Feature and Error Correcting Code (ECC) Features To access devices with a single-chip enable input, assert the chip
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CY7S1061G,
CY7S1061GE
16-Mbit
90-mA
20-mA
CY7S1061G
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Untitled
Abstract: No abstract text available
Text: CY7C10612G CY7C10612GE PRELIMINARY 16-Mbit 1 M x 16 Static RAM 16-Mbit (1 M × 16) Static RAM Features • High speed ❐ tAA = 10 ns ■ Embedded error-correcting code (ECC) for single bit error correction ■ Low active power ❐ ICC = 90mA typical ■
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CY7C10612G
CY7C10612GE
16-Mbit
54-pin
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Untitled
Abstract: No abstract text available
Text: APRIL 1995 MA31755 DS3572-2.3 MA31755 16-BIT FEEDTHROUGH ERROR DETECTION & CORRECTION UNIT EDAC The MA31755 is a 16 bit Error Detection and Correction Unit intended for use in high integrity systems for monitoring and correcting data values retrieved from memory. The EDAC
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MA31755
DS3572-2
16-BIT
MA31755
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SY006
Abstract: bit-slice SY107 A132A SY105 808-1 SYL alb phoenix me SY03 SY16
Text: MC109O5 16-BIT EXPANDABLE ERROR DETECTION AND CORRECTION UNIT The MCI0905 is a high speed 16-bit error detection and correction unit that is easily expandable to handle up to 96 data bits. The unit is designed to improve the reliability of memory systems by detecting and correcting any single bit error while detecting
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MC109O5
16-BIT
MCI0905
SY006
bit-slice
SY107
A132A
SY105
808-1 SYL
alb phoenix me
SY03
SY16
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MA31750 processor architecture
Abstract: MA31750 DS3572-4 edac MA31755 DS3572-3 md08
Text: MA31755 MA31755 16-Bit Feedthrough Error Detection & Correction Unit EDAC Replaces June 1999 version, DS3572-3.0 The MA31755 is a 16 bit Error Detection and Correction Unit intended for use in high integrity systems for monitoring and correcting data values retrieved from memory. The EDAC
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MA31755
16-Bit
DS3572-3
MA31755
MA31750 processor architecture
MA31750
DS3572-4
edac
md08
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MA31750
Abstract: MA31750 processor architecture MA31755 XG451 CS1N CB05
Text: MA31755 MA31755 16-Bit Feedthrough Error Detection & Correction Unit EDAC Replaces January 2000 version, DS3572-4.0 The MA31755 is a 16 bit Error Detection and Correction Unit intended for use in high integrity systems for monitoring and correcting data values retrieved from memory. The EDAC
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MA31755
16-Bit
DS3572-4
MA31755
MA31750
MA31750 processor architecture
XG451
CS1N
CB05
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atmel edac
Abstract: 1X1-21-1 nxor TPD16 29C532E
Text: 29C532E 32-Bit Bus-Watch EDAC Error Detection And Correction unit 1. Description The 29C532E EDAC is a very low power bus-watch 32-bit Error Detection And Correction unit EDAC . EDAC is used in a high integrity system for monitoring and correcting data values coming from the memory
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29C532E
32-Bit
29C532E
tpd16
atmel edac
1X1-21-1
nxor
TPD16
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Untitled
Abstract: No abstract text available
Text: LSI LOGIC L64715 Two-Error Correcting BCH Encoder-Decoder Description The L64715 implements the forw ard error co r rection, bit filling and synchronization schem e specified in ITU-TSS formerly CCITT recom m endation H.261. The forw ard error correcting code is a 2-error correcting BCH
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L64715
511-bit
S3D4fi04
44-Pin
53Q4fl04
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Untitled
Abstract: No abstract text available
Text: Work? Error-correcting codes sums to 0. Thus, calculating the checkbits as shown in Fig Many types of error-correcting techniques exist, but in data ure 1, the data word D15-D„) 0011 1101 1001 1001 yields communications, Hamming encoding probably finds the
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16-bit
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k 4110
Abstract: LC8955 LC8956 zcmd 3151-QIP100E
Text: Ordering number: E N & 4 1 1 0 _ CMOS LSI No. &4110 _ LC8956 Error-Correcting and ADPCM Decoder 1C for CD-I/CD-ROM XA Systems Preliminary PINOUT OVERVIEW The LC8956 is an error-correcting and ADPCM decod
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ENS3U110
LC8956
LC8956
LC8951
LC8955
100-pin
k 4110
zcmd
3151-QIP100E
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Untitled
Abstract: No abstract text available
Text: LSI LOGIC L64715 Two-Error Correcting BCH Encoder-Decoder Preliminary Description The L64715 implements the forward error cor rection, bit filling and synchronization scheme specified in International Consultative Committee for Telephones and Telegraphs
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L64715
L64715
44-Pin
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Untitled
Abstract: No abstract text available
Text: LSI LOGIC L64715 Two-Error Correcting BCH Encoder-Decoder Description The L64715 implements the forw ard error co r rection, bit filling and synchronization scheme specified in CCITT Consultative Committee on International Telephones and Telegraphs recom m endation H.261. The forw ard error
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L64715
L64715
44-Pin
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AK4110
Abstract: No abstract text available
Text: SANYO SEMICONDUCTOR CORP S3E D T T ì T Q T b D D 1 D 2 Ö Q TÔ3 « T S A J number: ENÌSS4110 T - 7 5 - 11-07 CMOS LSI No. ÌK4110 S A \Y O i LC8956 Error-Correcting and ADPCM Decoder IC for CD-I/CD-ROM XA Systems Preliminary OVERVIEW PINOUT The LC8956 is an error-correcting and ADPCM decod
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SS4110
K4110
LC8956
LC8956
LC8951
LC8955
AK4110
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lsi Reed-Solomon CODEC
Abstract: Reed-Solomon CODEC 58-BIT L64710
Text: LSI LOGIC L64710 8-Error Correcting Reed-Solomon Codec Description The L64710 contains an RS Reed-Solomon encoder and a RS decoder. This pipelined, high-speed, error-correction device imple ments an RS code as specified in CMTT (Committee for Mixed Telephone and Television,
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L64710
CCIR723.
lsi Reed-Solomon CODEC
Reed-Solomon CODEC
58-BIT
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Untitled
Abstract: No abstract text available
Text: LSI LOGIC L64710 8-Error Correcting Reed-Solomon Codec Description The L64710 contains an RS Reed-Solomon encoder and a RS decoder. This pipelined, high-speed, error-correction device im ple ments an RS code as specified in CMTT (Committee fo r Mixed Telephone and
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L64710
L64710
CCIR723.
68-Pin
MIL-STD-883C
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fsk modulator demodulator
Abstract: 89C026LT block diagram of laptop 89C024LT PLCC 68 intel
Text: 89C024LT ERROR CORRECTING LAPTOP MODEM CHIP SET CHMOS for Low Operating Power Low Standby Power Requirements Minimum Chip Count for Small size MNP* Operation through Class 4 for Error Correction MNP Class 5 Data Compression for Increased Throughput AT Command Set
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89C024LT
RS-232/V
89C026LT
fsk modulator demodulator
89C026LT
block diagram of laptop
PLCC 68 intel
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Untitled
Abstract: No abstract text available
Text: DP8400-2 5 National Semiconductor DP8400-2—E2C2 Expandable Error Checker/Corrector General Description The DP8400-2 Expandable Error Checker and Corrector E2C2 aids system reliability and integrity by detecting er rors in memory data and correcting single or double-bit er
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DP8400-2
DP8400-2â
DP8400-2
48-pin
DP8400-2S
DP8400-2/8409A
16-Blt
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Untitled
Abstract: No abstract text available
Text: P^pi GEC PLESSEY PRELIMINARY INFORMATION DS3569-2.4 MA31752 16-BIT FEEDTHROUGH ERROR DETECTION & CORRECTION UNIT EDAC The MA31752 is a 16 bit Error Detection and Correction Unit intended for use in a high integrity system for monitoring and correcting data values retrieved from memory. The EDAC
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DS3569-2
MA31752
16-BIT
MA31752
MA31750
68-pin
MA31750
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