TCA780
Abstract: TFK U 111 B TFK U 4614 B TFK S 186 P TFK U 217 B TFK BP w 41 n TFK BPW 41 N Tfk 880 TFK 148 TDSR 5150 G
Text: Industry Part Number 1N3245 1N3611GP 1N3612GP 1N3613GP 1N3614GP 1N3725 1N3957GP 1N4001GP 1N4002GP 1N4003GP 1N4004GP 1N4005GP 1N4006GP 1N4007GP 1N4245GP 1N4246GP 1N4247GP 1N4248GP 1N4249GP 1N4678.1N4717 1N4728A.1N4761A 1N4933GP 1N4934GP 1N4935GP 1N4936GP
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1N3245
1N3611GP
1N3612GP
1N3613GP
1N3614GP
1N3725
1N3957GP
1N4001GP
1N4002GP
1N4003GP
TCA780
TFK U 111 B
TFK U 4614 B
TFK S 186 P
TFK U 217 B
TFK BP w 41 n
TFK BPW 41 N
Tfk 880
TFK 148
TDSR 5150 G
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PDF
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EPM7192EGM
Abstract: EPM7192SQI160-10 EPM7032LC44-15 epm7032sti44-7 EPM7096JC84-3 EPM7192SQC1607 EPM7064SLI84-7 EPM7064SLC84-10 EPM7064STI100-7 epm7192egm160-15
Text: MAX 7000 Programmable Logic Device Family November 2002, ver. 6.4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
counter7032LC44-10
EPM7032LC44-12
EPM7032LC44-15
EPM7032LI44-15
EPM7032QC44-10H
EPM7032QC44-1
EPM7192EGM
EPM7192SQI160-10
epm7032sti44-7
EPM7096JC84-3
EPM7192SQC1607
EPM7064SLI84-7
EPM7064SLC84-10
EPM7064STI100-7
epm7192egm160-15
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PDF
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EPM7128SQC100-7 pin out
Abstract: BITBLAST epm7128stc100-6 epm7064lc68-12 epm7128stc100 epm7192egm160-15 epm7032sti44-7 EPM7192SQI160-10 EPM7256EGM883 EPM7192SQC1607
Text: MAX 7000 Programmable Logic Device Family June 2003, ver. 6.6 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
EPM7256EGM883B-15
5962-9324702MXC)
EPM7256EGM883B-20
5962-9324701MXC)
EPM7256EWM208-15
EPM7256EWM208-20
EPM7256EWM883B-15
EPM7128SQC100-7 pin out
BITBLAST
epm7128stc100-6
epm7064lc68-12
epm7128stc100
epm7192egm160-15
epm7032sti44-7
EPM7192SQI160-10
EPM7256EGM883
EPM7192SQC1607
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XC3030-70PC84C
Abstract: EPM5128LC EP330PC-15 A1020 transistor A1010B-PL68C EPM5128GM EP330PC15 EP330PC XC3042-70PC84C A1020A-PL84C
Text: ULCt Cross-Reference Matra MHS Cross reference list of devices supported for ULC conversion is not exhaustiv as new devices are added regularly. Additional devices not shown in this list, may also be supported. MHS encourages you to contact your local TEMIC sales representative
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A1010A-PL44C
A1010B-PL44C
ULC/A1010
44-PLCC
A1010A-PL44I
A1010B-PL44I
A1010A-1PL44C
A1010B-1PL44C
A1020A-1PL44C
XC3030-70PC84C
EPM5128LC
EP330PC-15
A1020 transistor
A1010B-PL68C
EPM5128GM
EP330PC15
EP330PC
XC3042-70PC84C
A1020A-PL84C
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EPM7032
Abstract: EPM7032S EPM7032V EPM7064 EPM7064S EPM7096 EPM7128E EPM7128S PQFP 176 J-Lead ck1321
Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family June 1996, ver. 4 Data Sheet Features. • ■ ■ ■ ■ ■ ■ ■ ■ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX)
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7000E
7000S
7000S
192-Pin
EPM7256E
208-Pin
EPM7256S
EPM7032
EPM7032S
EPM7032V
EPM7064
EPM7064S
EPM7096
EPM7128E
EPM7128S
PQFP 176 J-Lead
ck1321
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EPM7160LC84-20
Abstract: altera EPM7128QC160 epm7160lc84 EPM7256EGC192 EPM7256GC192 EPM7128LC84-20 EPM7256MC208-20 EPM7128QC100-15 EPM7128LC84 EPM7128QC
Text: MAX 7000 Programmable Logic Device Family December 2002, ver. 6.5 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
counter208-25
EPM7256MC208-2
EPM7256MC208
EPM7256SRC208-12
EPM7256WC208-20
EPM7256WC208-25
EPM7256WC208-2
EPM7160LC84-20
altera EPM7128QC160
epm7160lc84
EPM7256EGC192
EPM7256GC192
EPM7128LC84-20
EPM7256MC208-20
EPM7128QC100-15
EPM7128LC84
EPM7128QC
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100-Pin Package Pin-Out Diagram
Abstract: EPM7032 44 pin plcc c5248 EPM7032 EPM7032S EPM7032V EPM7064 EPM7064S EPM7096 EPM7128E
Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family July 1998, ver. 5.03 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX)
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7000E
7000S
7000S
100-Pin Package Pin-Out Diagram
EPM7032 44 pin plcc
c5248
EPM7032
EPM7032S
EPM7032V
EPM7064
EPM7064S
EPM7096
EPM7128E
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PDF
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EPM7032 Transition
Abstract: EPM7032 EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E
Text: MAX 7000 Programmable Logic Device Family September 2005, ver. 6.7 Data Sheet • Features. ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
7000S
EPM7032 Transition
EPM7032
EPM7064
EPM7096
EPM7128E
EPM7160E
EPM7192E
EPM7256E
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PDF
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EPM7032
Abstract: EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E EPM7128S
Text: MAX 7000 Programmable Logic Device Family December 2002, ver. 6.5 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
7000S
EPM7032
EPM7064
EPM7096
EPM7128E
EPM7160E
EPM7192E
EPM7256E
EPM7128S
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PDF
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EPM7128S
Abstract: No abstract text available
Text: MAX 7000 Programmable Logic Device Family November 2002, ver. 6.4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
EPM7128S
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100-Pin Package Pin-Out Diagram
Abstract: 7128s 84-Pin Package Pin-Out Diagram CLASSIC EPLD FAMILY u8318 EPM7064 100-Pin Package Pin-Out Diagram
Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family June 1996, ver. 4 Data Sheet Features. • ■ ■ ■ ■ ■ ■ ■ ■ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX)
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7000E
7000S
7000S
100-Pin Package Pin-Out Diagram
7128s
84-Pin Package Pin-Out Diagram
CLASSIC EPLD FAMILY
u8318
EPM7064 100-Pin Package Pin-Out Diagram
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epm7064 adapter
Abstract: data sheet for 3 input xor gate EPM7064 jk flipflop EPM7032 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E
Text: MAX 7000 Programmable Logic Device Family March 2001, ver. 6.1 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
7000S
epm7064 adapter
data sheet for 3 input xor gate
EPM7064
jk flipflop
EPM7032
EPM7096
EPM7128E
EPM7160E
EPM7192E
EPM7256E
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PDF
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epm7032
Abstract: EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E 100-Pin Package Pin-Out Diagram epm7128s
Text: MAX 7000 Programmable Logic Device Family November 2001, ver. 6.3 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
7000S
epm7032
EPM7064
EPM7096
EPM7128E
EPM7160E
EPM7192E
EPM7256E
100-Pin Package Pin-Out Diagram
epm7128s
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PDF
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epm7064 adapter
Abstract: MAX 7000 EPM7032 EPM7064 EPM7096 EPM7128E EPM7160E EPM7192E EPM7256E
Text: MAX 7000 Programmable Logic Device Family June 2003, ver. 6.6 Features. Data Sheet • ■ ■ ■ ■ ■ ■ f High-performance, EEPROM-based programmable logic devices PLDs based on second-generation MAX® architecture 5.0-V in-system programmability (ISP) through the built-in
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7000S
7000S
epm7064 adapter
MAX 7000
EPM7032
EPM7064
EPM7096
EPM7128E
EPM7160E
EPM7192E
EPM7256E
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PDF
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programming epm7032
Abstract: EPM7032
Text: Application Note 38 Configuring Multiple FLEX 8000 Devices Configuring Multiple FLEX 8000 Devices May 1994, ver. 2 Introduction Application Note 38 The architecture of Altera’s Flexible Logic Element MatriX FLEX devices supports several methods for configuring multiple FLEX 8000 devices in a
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Ch000
programming epm7032
EPM7032
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programming epm7032
Abstract: epm7032 EPM7032 Transition EPM7128 EPLD epm7032 plcc
Text: EPM7032 EPLD 32-Macrocell Programmable Logic Device September 1993, ver. 3 Features Data Sheet □ □ □ □ □ □ □ □ H igh-perform ance, erasable CMOS EPLD based on second-generation MAX architecture 600 usable gates C om binatorial speeds w ith tPD = 7.5 ns
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EPM7032
32-Macrocell
44-pin
programming epm7032
EPM7032 Transition
EPM7128 EPLD
epm7032 plcc
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PDF
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EPM7032
Abstract: EPM7032v PLMJ7032 Kad v0
Text: «AR 1 « »93 EPM7032V EPLD a n ü 3.3-Volt 32-Macrocell Device ^ Data Sheet January 1993, ver. 1 Features. □ 3.3-V version of the popular EPM7032 EPLD Combinatorial speeds w ith tpo = 15 ns Clock frequencies up to 71 MHz Innovative power-saving features
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OCR Scan
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EPM7032V
32-Macrocell
EPM7032
PLMJ7032
Kad v0
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PDF
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Altera 7032
Abstract: No abstract text available
Text: 2 2 1992 AN Û EPM7032 EPLD nA \ High-Performance 32-Macrocell Device Data Sheet December 1991, ver. 1 Featu res. □ High-performance erasable CMOS EPLD based on second-generation Multiple Array M atrix M AX architecture Combinatorial speeds with tPD= 12 ns
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OCR Scan
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EPM7032
32-Macrocell
Altera 7032
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PDF
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epm7032v
Abstract: No abstract text available
Text: Features. □ □ Preliminary Information □ □ □ □ □ 3.3-V version of the popular EPM7032 EPLD Combinatorial speeds with tPD = 12 ns Clock frequencies up to 90.9 M Hz Innovative pow er-saving features 30% to 50% pow er savings over 5-V operation Power-down m ode controlled by a pow er-down pin to allow
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OCR Scan
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EPM7032
032V-12,
032V-15,
032V-20
ALTED001
epm7032v
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PDF
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EP1800I
Abstract: 8946801XC epm5130 epx780 EPX740 EP224 Altera EP1800i
Text: Component Selection Guide March 1995, ver. 2 Introduction Data Sheet This selection guide lists devices available from Altera: • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ FLEX 10K devices FLEX 8000 devices Configuration EPROM devices MAX 9000 devices
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7000S
EP1800I
8946801XC
epm5130
epx780
EPX740
EP224
Altera EP1800i
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PDF
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Untitled
Abstract: No abstract text available
Text: M AX 7000 IVI M A Î U U U Includes MAX 7000E Programmable Logic Device Family M arch 1995, ver. 3 Features. D a ta s h e e t • ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM devices based on secondgeneration Multiple Array M atrix MAX architecture
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OCR Scan
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7000E
EPM7256E
192-Pin
208-Pin
5555555555555552JM555555555555
EPM7256E
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PDF
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epm 7032 slc 44
Abstract: EPM7064 100-Pin Package Pin-Out Diagram
Text: Includes MAX 7000E & MAX 7000S MAX 7000 Programmable Logic Device Family June 1996, ver. 4 Data Sheet Features. • ■ ■ ■ ■ ■ ■ ■ ■ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array MatriX (MAX)
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OCR Scan
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7000E
7000S
7000S
7256E
192-Pin
208-Pin
7256E
7256S
epm 7032 slc 44
EPM7064 100-Pin Package Pin-Out Diagram
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PDF
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100-Pin Package Pin-Out Diagram
Abstract: C343I ZF MicroSystems 486
Text: MAX 7000 ju iä ti MAX Programmable Logic Device Family J a n u a ry 1998. ver. 5 Features. D ata S h e e t • ■ ■ ■ ■ ■ ■ ■ High-performance, EEPROM-based programmable logic devices PLDs based on second-generation Multiple Array M atrix (MAX)
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OCR Scan
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7000S
7256E
192-Pin
208-Pin
100-Pin Package Pin-Out Diagram
C343I
ZF MicroSystems 486
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PDF
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r12n10
Abstract: EMP7032 max7000
Text: Includes MAX7000E M A Y IVI M A 7 0 0 0 / UUU Programmable Logic Device Family March 1995, ver. 3 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ High-performance CMOS EEPROM devices based on secondgeneration Multiple Array MatriX MAX architecture
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OCR Scan
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MAX7000E
EPM7256E
192-Pin
208-Pin
r12n10
EMP7032
max7000
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PDF
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