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    EDS1232AASE Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Type PDF
    EDS1232AASE Elpida Memory 128M bits SDRAM (4M words x 32 bits) Original PDF
    EDS1232AASE-60-E Elpida Memory 128M bits SDRAM (4M words x 32-Bits) Original PDF
    EDS1232AASE-60L-E Elpida Memory 128M bits SDRAM (4M words x 32-Bits) Original PDF
    EDS1232AASE-75-E Elpida Memory DRAM Chip: SDRAM: 16MByte: 3.3V Supply: Commercial: FBGA: 90-Pin Original PDF
    EDS1232AASE-75L-E Elpida Memory DRAM Chip: SDRAM: 16MByte: 3.3V Supply: Commercial: FBGA: 90-Pin Original PDF

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    EDS1232AASE

    Abstract: No abstract text available
    Text: DATA SHEET 128M bits SDRAM EDS1232AASE 4M words x 32 bits Specifications Pin Configurations • Density: 128M bits • Organization  1M words × 32 bits × 4 banks • Package: 90-ball FBGA  Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V


    Original     		PDF EDS1232AASE 90-ball 166MHz/133MHz cycles/64ms M01E0107 E0350E31 EDS1232AASE

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET 128M bits SDRAM EDS1232AASE 4M words x 32 bits Specifications Pin Configurations • Density: 128M bits • Organization ⎯ 1M words × 32 bits × 4 banks • Package: 90-ball FBGA ( BGA ) ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V


    Original     		PDF EDS1232AASE 90-ball 166MHz/133MHz cycles/64ms M01E0107 E0350E30

    EDS1232AASE

    Abstract: No abstract text available
    Text: DATA SHEET 128M bits SDRAM EDS1232AASE 4M words x 32 bits Pin Configurations • Density: 128M bits • Organization ⎯ 1M words × 32 bits × 4 banks • Package: 90-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 3.3V ± 0.3V • Clock frequency: 166MHz/133MHz (max.)


    Original     		PDF EDS1232AASE 90-ball 166MHz/133MHz cycles/64ms E0350E31 EDS1232AASE

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET 128M bits SDRAM EDS1232AASE 4M words x 32 bits Description Pin Configurations The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.


    Original     		PDF EDS1232AASE EDS1232AA 90-ball 166MHz M01E0107 E0350E10

    EDS1232AA

    Abstract: EDS1232AASE BA0BA1A11
    Text: DATA SHEET 128M bits SDRAM EDS1232AASE 4M words x 32 bits Description Pin Configurations The EDS1232AA is a 128M bits SDRAM organized as 1,048,576 words × 32 bits × 4 banks. All inputs and outputs are synchronized with the positive edge of the clock.


    Original     		PDF EDS1232AASE EDS1232AA 90-ball 166MHz M01E0107 E0350E20 EDS1232AASE BA0BA1A11

    pc2-5300

    Abstract: elpida 1gb pc2 ECL120ACECN ELPIDA DDR2 PC2-3200 ELPIDA 68-FBGA Elpida DDR2 SDRAM component EDE1104ABSE EDE1108AASE
    Text: SELECTION GUIDE DRAM Selection Guide Document No. E0853E70 Ver.7.0 Date Published July 2006 (K) Japan Printed in Japan URL: http://www.elpida.com Elpida Memory, Inc. 2006 DRAM Selection Guide CONTENTS 1. DDR2


    Original     		PDF E0853E70 240-pin 200-pin M01E0107 pc2-5300 elpida 1gb pc2 ECL120ACECN ELPIDA DDR2 PC2-3200 ELPIDA 68-FBGA Elpida DDR2 SDRAM component EDE1104ABSE EDE1108AASE