KVL05
Abstract: ECL IC NAND EL05
Text: MC100LVEL05 3.3V ECL 2-Input Differential AND/NAND The MC100LVEL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the MC100EL05 device and operates from a 3.3 V supply voltage. With propagation delays and output transition times equivalent to the EL05, the LVEL05 is ideally
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MC100LVEL05
MC100EL05
LVEL05
AND8020
AN1404
AN1405
AN1406
AN1503
KVL05
ECL IC NAND
EL05
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ECL IC NAND
Abstract: No abstract text available
Text: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be
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MC10E104,
MC100E104
MC10E/100E104
MC10E104FN
PLCC-28
AND8020
AN1404
AN1405
AN1406
AN1503
ECL IC NAND
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KEL04
Abstract: HL04 HEL04 ECL IC NAND
Text: MC10EL04, MC100EL04 5V ECL 2-Input AND/NAND The MC10EL/100EL04 is a 2-input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those
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MC10EL04,
MC100EL04
MC10EL/100EL04
HEL04
KEL04
AND8020
AN1404
AN1405
AN1406
AN1503
HL04
ECL IC NAND
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HEL05
Abstract: KEL05 hl05 ECL IC NAND
Text: MC10EL05, MC100EL05 5V ECL 2-Input Differential AND/NAND The MC10EL/100EL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the E404 device with higher performance capabilities. With propagation delays and output transition
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MC10EL05,
MC100EL05
MC10EL/100EL05
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
HEL05
KEL05
hl05
ECL IC NAND
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D3A transistor
Abstract: No abstract text available
Text: MC10E404, MC100E404 5 V ECL Quad Differential AND/NAND The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper
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MC10E404,
MC100E404
MC10E404/100E404
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1568
D3A transistor
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MC100E104
Abstract: MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 ECL IC NAND
Text: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be
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MC10E104,
MC100E104
MC10E/100E104
MC10E104FN
PLCC-28
MC10E104/D
MC100E104
MC100E104FN
MC100E104FNR2
MC10E104
MC10E104FN
MC10E104FNR2
ECL IC NAND
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tag 725
Abstract: MC100E104 MC10E104 MC10E104FN ECL IC NAND
Text: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate Description The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be
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MC10E104,
MC100E104
MC10E/100E104
PLCC-28
MC10E104/D
tag 725
MC100E104
MC10E104
MC10E104FN
ECL IC NAND
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marking CODE D2B
Abstract: MC100E104 MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 marking D3B ECL IC NAND
Text: MC10E104, MC100E104 5VĄECL Quint 2ĆInput AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be
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MC10E104,
MC100E104
MC10E/100E104
MC10E104FN
EIA/JESD78
r14525
MC10E104/D
marking CODE D2B
MC100E104
MC100E104FN
MC100E104FNR2
MC10E104
MC10E104FN
MC10E104FNR2
marking D3B
ECL IC NAND
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ECL IC NAND
Abstract: No abstract text available
Text: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate Description The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be
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MC10E104,
MC100E104
MC10E/100E104
MC10E104/D
ECL IC NAND
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signal path designer
Abstract: No abstract text available
Text: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency
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/D1203-0589
signal path designer
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ECL IC NAND
Abstract: No abstract text available
Text: CXB1101Q SO N Y Quad 3 - Input AND/NAND Gate Description Preliminary Package Outline CXB1101Q is an ultra high speed bipolar monolithic IC, which contains four 3-input AND/ NAND gates. I/O levels are ECL 100K compatible. This IC can be suitably applied to Ultra high
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CXB1101Q
CXB1101Q
FQFP-24P-01
ECL IC NAND
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ECL IC NAND
Abstract: CXB1101Q 3 input nand gate 16 pin ic logic gate diagram of ic quad nand gate 16 pin ic
Text: CXB1101Q SO N Y Quad 3 - Input AND/NAND Gate Preliminary Package Outline Description CXB1101Q is an ultra high speed bipolar monolithic IC, which contains four 3-input AND/ NAND gates. I/O levels are ECL 100K compatible. This IC can be suitably applied to Ultra high
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CXB1101Q
CXB1101Q
FQFP-24P-01
ECL IC NAND
3 input nand gate 16 pin ic
logic gate diagram of ic
quad nand gate 16 pin ic
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ECL IC NAND
Abstract: No abstract text available
Text: sony CXB1501Q-Y . Quad 3-input AND/NAND Gate Description Pin Assignm ent The CXB1501Q-Y is an ultra high speed monolithic ECL IC, which contains our 3-input AND /NAND gates. 24 25 22 21 20 19 18 1? Features • Typical AC characteristics NC Q Tpd=540ps O iC
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CXB1501Q-Y
CXB1501Q-Y
540ps
220ps
ECL IC NAND
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H20R
Abstract: FLIPFLOP SCHEMATIC schematic diagram power supply inverter type 1500 SL254 rs FLIPFLOP SCHEMATIC mdf 24 SIC 850 inverter SL2541 sp97508 PLESSEY CLA
Text: » JULY 1988 Ä PLESSEY w ' S e m ic o n d u c t o r s , ELA 60000 SERIES Supersedes August 1987 Edition ECL GATE ARRAYS The ELA60000 series of ECL gate arrays is a very high p e rfo rm a n c e fam ily of S e m i-C u s to m products based on an advanced 1.5 micron bipolar
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ELA60000
PS2118
i3245
H20R
FLIPFLOP SCHEMATIC
schematic diagram power supply inverter type 1500
SL254
rs FLIPFLOP SCHEMATIC
mdf 24
SIC 850 inverter
SL2541
sp97508
PLESSEY CLA
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ECL IC NAND
Abstract: No abstract text available
Text: _ CXB1501Q-Y SONY. Quad 3-input AND/NAND Gate Description Pin Assignment The CXB1501Q-Y is an ultra high speed monolithic ECL IC, which contains four 3-input AND/NAND gates. NC 01 01 DI» O l i 01c D2» NC n Features • Typical AC characteristics Tpd=540ps
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CXB1501Q-Y
CXB1501Q-Y
540ps
ECL IC NAND
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ECL IC NAND
Abstract: No abstract text available
Text: s o n y ._ CXB1101Q Quad 3-input AND/NAND Gate Description Pin Assignment The CXB1101Q is an ultra high speed monolithic ECL IC, which contains four 3-input AND/NAND gates. 01c D1B DlA 01 ST IB 17 16 15 14 13 n n n n n n Features • Typical AC characteristics
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CXB1101Q
CXB1101Q
490ps
ECL IC NAND
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ECL IC NAND
Abstract: No abstract text available
Text: A N A LO G D E V IC E S □ FEATURES Three Matched, Offset-Trimmed Comparators ECL Logic Permits 50 Mb/s Transfer Rates Three Levels of Data Qualification Amplitude Time Above Threshold Polarity of Data 100 ps Typical Additional Pulse Pairing Temperature Compensated Operation
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AD891A
AD891A
AD890
20-pin
14-pin
AD891AJP
ECL IC NAND
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LMA9000
Abstract: LMA9190 a9284 LMA9050 A9072 tc 74181 alu A9033
Text: LSI LOGIC . 1390 LMA9000 M icro Array Series Description The LMA9000 M ic ro A rra y se rie s is an HCMOS se m icu sto m te c h n o lo g y o ffe rin g both speed and pe rfo rm a n ce e q u iva le n t to 10K ECL and high gate d e n sity ASICs. The LMA9000 M ic ro
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LMA9000
LMA9190
a9284
LMA9050
A9072
tc 74181 alu
A9033
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W47B
Abstract: transistor m285 w41b M331 transistor M313 TRANSISTOR MCA2500ECL a6019 Tektronix k15 yg 2025 VIM-332
Text: Ordar this data shaat by MCA1500M/D MOTOROLA n S E M IC O N D U C T O R S P.O. BOX 20912 • PHO ENIX, A R IZ O N A 85036 A d v a n c e Information MOSAIC II MCA1500M MACROCELL ARRAY ECL MACROCELL ARRAY This specification defines the design and performance require
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MCA1500M/D
MCA1500M
MCA1500M,
1152-bits
MK145BP,
W47B
transistor m285
w41b
M331 transistor
M313 TRANSISTOR
MCA2500ECL
a6019
Tektronix k15
yg 2025
VIM-332
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ECL IC NAND
Abstract: sumitomo crm epoxy 1061 CRM-1061 L451 NL4519-2 ECL NAND IMPLEMENTATION sumitomo crm epoxy
Text: NS CS E003A M P —— PRELIMINARY [\| L451 9 2 Revised on April 17, 1995 2 INPUT AND / NAND The NL4519-2 is an ultra-fast 2 input AND / NAND gate which operates at up to 8 Gb/s [Typ.] NRZ bit rate. The NL4519-2, designed by Low-power Source Coupled FET Logic
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E003A
NL4519-2
NL4519-2,
50-ohm
ECL IC NAND
sumitomo crm epoxy 1061
CRM-1061
L451
ECL NAND IMPLEMENTATION
sumitomo crm epoxy
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ECL IC NAND
Abstract: No abstract text available
Text: SILICON MONOLITHIC TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT TC7ST00F/FU 2-INPUT N A N D GATE The TC7ST00 is a high speed CMOS 2-INPUT NAND GATE fabricated w ith silicon gate CMOS technology. It achieves th e high speed operation sim ilar to equivalent LSTTL w h ile m ain ta in in g th e CMOS lo w pow er
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TC7ST00F/FU
TC7ST00
19BIT
18BIT
TD6381
TD6382
ECL IC NAND
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CLCC-8
Abstract: e104 synergy system SY100E104 SY101E104 SY10E104
Text: ^ QUINT 2-INPUT AND/NAND GATE SYNERGY S E M IC O N D U C T O R SY^00E104 OI iu it- D E S C R IP T IO N FEATURES • ■ ■ ■ ■ 600 ps Max. Propagation Delay. True and Complementary outputs. OR/NOR Function Outputs. ESD protection of 2000V. Fully compatible with Industry standard 10KH, 100K I/O
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SY10E104
SY100E104
SY101E104
SY100E104:
SY101E104:
MC10E/100E104.
SY10E/100E/101E104
SY100/101E104
100E/101E
CLCC-8
e104
synergy system
SY101E104
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ECL IC NAND
Abstract: HMD11104-2 HMD-11104-2 HMD11104
Text: HARRIS MW S E M I C O N D UCTOR ^7 DE^ r □□□□□5b fl | ~ y ^ g - 2 3 GaAs Digital 1C 5-INPUT NAND/AND GATE HMD-11104-2 DC - 2.5 GHz DATA RATE PRELIMINARY PRODUCT DATA_ NOVEMBER 1986 HARRIS MICROWAVE SEMICONDUCTOR FEATURES □ Typical Input Data Rate of 2.5 GHz
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HMD-11104-2
of500
8-11104-2P
ECL IC NAND
HMD11104-2
HMD-11104-2
HMD11104
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ECL IC NAND
Abstract: No abstract text available
Text: & QUINT 2-INPUT AND/NANDGATE SYNERGY SEMICONDUCTOR SyX 00E104 IviniPind OY lU I t IU 4 DESCRIPTIO N FEATURES 600 ps Max. Propagation Delay. True and Complementary outputs. ESD protection of 2000V. The SY10E/100E/101E104 is a quint 2-input AND/NAND gate designed for use in new, high performance ECL systems. The
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SyX00E104
SY10E/100E/101E104
SY100E104:
SY101E104:
SY100/101E104
ECL IC NAND
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