10137N
Abstract: ECL binary Counter ECL 10137
Text: Philips Components-Signetics 10137 Document No. 853-0666 ECN No. 99799 Universal Counter Date of Issue June 14, 1990 Status Product Specification Universal Decade Counter ECL Products FEATURES ORDERING INFORMATION •Typical propagation delay: 3.3ns DESCRIPTION
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120mA
16-Pin
10137N
10137F
100MHz.
ECL binary Counter
ECL 10137
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SP8635B
Abstract: sp8635 sp8634 SP8637B SP8634B
Text: PLESSEY S E M I CON D UCT GR S • 12E & ■ 7 2 5 0 S 13 00 0=1732 1 SP8634B SP8635B SP8637B 700/600/400MHZ + 10 BCD OUTPUTS The SP8634/5 and 7 are ECL decade counters with TTL com patible BCD outputs. They require an AC coupled input o f 600mV p-p and have an ECL 10K com patible inhibit input
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SP8634B
SP8635B
SP8637B
700/600/400MHZ
SP8634/5
600mV
SP8634/5/7B
000T73S
111/1OK
722D513
sp8635
sp8634
SP8637B
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sp8635
Abstract: sp8634 SP8635B
Text: GEC PL E S S E Y [ S E M I C O N D U C T O R S I SP8634 SP8635 SP8637 700/600/400MHZ * 10 BCD OUTPUTS Th e SP8634/5 and 7 are ECL decade counters with i n compatible B C D outputs. Th ey require an A C coupled input of 600m V p-p and have a n EC L 10K com patible inhibit input
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SP8634
SP8635
SP8637
700/600/400MHZ
SP8634/5
SP8634/5/7
III/10K
2N5771
SP8635B
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sp101 655
Abstract: SP1690 SP1670 synchronous counter using 4 flip flip SP101 SP10137 SP10231
Text: SP10137 O PLESSEY ECL 10,000 SERIES SEMICONDUCTORS SP10137 U N IVER SA L DECADE C O UNTER S E Q U E N T IA L T R U T H TA B LE * IN P U T S O UTPUTS C arry C loc k S1 S2 DO D1 D2 D3 In L L H H H L o L H o o L H o o L H o o L H o o L H o o o L H o o H H o o
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SP10137
SP10137
50-ohm
sp101 655
SP1690
SP1670
synchronous counter using 4 flip flip
SP101
SP10231
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ECL Decade Counter
Abstract: No abstract text available
Text: F10010 • F10016 BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable, cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre settable, cascadable 4-Bit Binary Counter. They are m ultifunction MSI building
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F10010
F10016
F10010
F10016
F0100
F10Q16
ECL Decade Counter
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F10016 DC
Abstract: F10010 F10016
Text: F1001 /» F10016y BCD DECADE C0UNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable. cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre settable, cascadable 4-Bit Binary Counter. They are m u ltifu n ctio n MSI building
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F10016
F10010
F10016
F10016 DC
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cmos 14 bit binary counter
Abstract: 4 bit binary divider Asynchronous up and down counter ECL Decade Counter CD4K DM74LS90 74F579 MM74C926 counter 74F160A
Text: Logic Products by Function Counter Products Logic Product Family Product Description Package Voltage Node DM74LS90 Bipolar-LS Decade and Binary Counter DIP SOIC 5 MM74C90 74C CMOS 4-Bit Decade Counter DIP 5 other MM74C93 74C CMOS 4-Bit Binary Counter DIP 5
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DM74LS90
MM74C90
MM74C93
74F161A
74F160A
74AC161
74ACT161
74F1ge
CD4040BC
12-Stage
cmos 14 bit binary counter
4 bit binary divider
Asynchronous up and down counter
ECL Decade Counter
CD4K
DM74LS90
74F579
MM74C926
counter
74F160A
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fairchild ECL
Abstract: ECL Decade Counter F10010 F10016 ECL binary Counter ecl 10016
Text: Fiooic/» FlOOie^ BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F10010 is a high-speed synchronous, presettable. cascadable BCD Decade Counter and the F10016 is a high-speed synchronous, pre settable, cascadable 4-Bit Binary Counter. They are m u ltifu n ctio n MSI building
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F10010
F10016
F10010
F10016
fairchild ECL
ECL Decade Counter
ECL binary Counter
ecl 10016
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ECL Decade Counter
Abstract: S8PE Fairchild 95010 f95016DC
Text: F9501 /f95016 v BCD DECADE COUNTER/4-BIT BINARY COUNTER GENERAL DESCRIPTION — The F95010 is a high speed synchronous, presettable, cascadable BCD Decade Counter and the F95016 is a high speed synchronous, pre settable, cascadable 4-B it Binary Counter. They are multifunction MSI building blocks
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F9501
/f95016
F95010
F95016
ECL Decade Counter
S8PE
Fairchild 95010
f95016DC
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Untitled
Abstract: No abstract text available
Text: F95010-F95016 BCD DECADE C0UNTER/4-BIT BINARY COUNTER G E N E R A L D E S C R IP T IO N — The F9501 0 is a high speed synchronous, presettable, cascadable BCD Decade C ounter and the F95016 is a high speed synchronous, p re settable, cascadabie 4 -B it B inary Counter. They are m u ltifu n c tio n M SI building blocks
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F95010-F95016
F9501
F95016
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fairchild ECL
Abstract: F95010 F95016 ECL Decade Counter Fairchild 95010 f95016DC 95010
Text: F95010^F95016 v BCD DECADE COUNTER/4-BIT BINARY COUNTER G E N E R A L D E S C R IP T IO N — The F9 501 0 is a high speed synchronous, presettable, cascadable BCD Decade Counter and the F95016 is a high speed synchronous, p re settable, cascadable 4 -B it B inary Counter. They are m u ltifu n ctio n MSI building blocks
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F95010â
F95016
F95010
F95016
fairchild ECL
ECL Decade Counter
Fairchild 95010
f95016DC
95010
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11C90
Abstract: fairchild 11c90
Text: 11C90/11C91 650 MHz PRESCALERS 11 COO SER IES GENERAL DESCRIPTION — The 11 CSX and 11C91 are high speed prescalers de signed specifically fo r com m unication and instrum entation applications. All discus sions and examples in this data sheet are applicable to the 11C91 as well as the 11C90.
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11C90/11C91
11C91
11C90.
11C90
1B421
fairchild 11c90
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fairchild 11c90
Abstract: No abstract text available
Text: iicWiiC9-r 650 MHz PRESCALERS 11 COO SERIES GENERAL DESCRIPTION— The 11C90 and 11C91 are high speed prescalers de signed specifically for communication and instrumentation applications. All discus sions and examples in this data sheet are applicable to the 11C91 as well as the 11C90.
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11C90
11C91
11C90.
fairchild 11c90
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85700A
Abstract: HP3325B HP 70820A TA-NWT-000253 sinusoidal "signals generation" SY69743 70841 11801B HP70841B SY69952
Text: SONET OC-3 JITTER MEASUREMENT APPLICATION NOTE AN-04 JITTER GENERATION Jitter Generation Definition Bellcore TR-NWT-000499 Issue 4 , section 7.3.3 "Jitter generation is the process whereby jitter appears at the output port of an individual unit of digital equipment in the
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AN-04
TR-NWT-000499
TA-NWT-000253
12KHz
0004A
5700A
3752A
10MHz
20MHz)
11801B
85700A
HP3325B
HP 70820A
TA-NWT-000253
sinusoidal "signals generation"
SY69743
70841
HP70841B
SY69952
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Untitled
Abstract: No abstract text available
Text: GEC PLESSEY SEMICONDS 31E » • 37bfiS25 D011-?n 3 ■ "P 4 Z < M PLESSEY S E M IC O N D U C T O R S — - JUNE1990 - — ULA DF SERIES HIGH PERFORMANCE MIXED ANALOG/DIGITAL ARRAY FAMILY Supersedes May 198$ edition T he n e w D F s e rie s o f a rra y s a r e d e s ig n e d to p ro v id e
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37bfiS25
100MHz.
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DV46 1
Abstract: No abstract text available
Text: JANUARY 1995 ULA DT/DV Series DS2468 -2.2 ULA DT & DV SERIES HIGH PERFORMANCE MIXED DIGITAL/ANALOG ARRAY FAMILY ULTRA HIGH SPEED DIGITAL ARRAYS WITH HIGH PERFORMANCE ANALOG The DT/DV series of arrays are designed to provide cost effective single chip solutions to high speed
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DS2468
200MHz
200MHz
DV46 1
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4-bit full adder using nand gates and 3*8 decoder
Abstract: gec plessey ula df69 DF Series DF-Series 1.8 GHz direct frequency vco with cad assessment df83 30DF1 T3265 filter for GPS spice
Text: S i GEC PLESSEY S E M I C O N D U C T O R S DS2312-3-1 ULA DF SERIES HIGH PERFORMANCE MIXED DIGITAL/ANALOG ARRAY FAMILY S u p e rs e d e s J u n e 1990 ed itio n The D F series of arrays is designed to provide cost effective single chip solutions to high speed combined digital and analog
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DS2312-3-1
100MHz.
4-bit full adder using nand gates and 3*8 decoder
gec plessey ula
df69
DF Series
DF-Series
1.8 GHz direct frequency vco with cad assessment
df83
30DF1
T3265
filter for GPS spice
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95H90
Abstract: Fairchild 95H90 8 bit left right shift register 95h90 prescaler 11C83 1I1C05 ECL Decade Counter prescaler 256 95H16 470 e65
Text: FAIRCHILD DIGITAL ECL Logic/Connection Diagram 4S 150 3.2 395 E63 Package s Power Dissipation mW (Typ) D Parallel Entry No. of Bits Max Clock Freq. MHz (Typ) 4 Clock To Output Delay-ns (Typ) 95H00 Serial Entry 4-Bit Shift Register No. of Bits Function £
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95H00
00145A
1I1C05
95H91
11C91
95H90
-MO/11
I1C90
11C83
105XX
95H90
Fairchild 95H90
8 bit left right shift register
95h90 prescaler
11C83
1I1C05
ECL Decade Counter
prescaler 256
95H16
470 e65
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95H90
Abstract: 95h90 prescaler 95H16
Text: FAIRCHILD DIGITAL ECL Parallel Entry No. of Bits Max Clock Freq. MHz Typ Clock To Output Delay-ns (Typ) Power Dissipation mW (Typ) Logic/Connection Diagram 95H00 4 D 4S 150 3,2 395 E63 6B 2 4-B it S hift Register 95000 4 D 4S 200 3.2 345 E64 6B 3 4-Bit Shift Register
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95H00
00145A
-s-10/11
106XX
95H90
95h90 prescaler
95H16
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DV31 1
Abstract: No abstract text available
Text: b£E D Si 3 7 bflS2 S 0 0 1 7 7 4 8 b 20 M P L S B GEC PLESSEY GEC PLESSEY SEniCONDS S E M I C O N D U C T O R S DS2468-2-2 ULA DT & DV SERIES HIGH PERFORMANCE MIXED DIGITAL/ANALOG ARRAY FAMILY ULTRA HIGH SPEED DIGITAL ARRAYS WITH HIGH PERFORMANCE ANALOG Supersedes December 1990 edition
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DS2468-2-2
DV31 1
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Fairchild 95H90
Abstract: 95H90 95h90 prescaler ECL Decade Counter 11C05 470 e65 prescaler 256 95H16 95H91 fairchild 11c90
Text: FAIR C H ILD D IG ITA L ECL D D D D l .D r Dr Dr — DEVICE 3 4 -B it S h ift R egister 10000 4 4 4 -B it L e ft/R ig h t S h ift R e g iste r 10141/10541 4 5 8 -B it L e ft/R ig h t S h ift R e g iste r 100141 6 16x4 R e g iste r File 100145A 7 8 -B it S h ift M a trix
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95H00
00145A
11C05
95H91
11C91
-MO/11
95H90
-M0/11
11C90
11C83
Fairchild 95H90
95H90
95h90 prescaler
ECL Decade Counter
11C05
470 e65
prescaler 256
95H16
95H91
fairchild 11c90
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si117
Abstract: No abstract text available
Text: F10136 • F10536 • F10137 • F10537 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10136/F10536 and F10137/F10537 are 4-stage synchronous counters capable of operating at typical count rates ot 250 MHz. The circuits are designed
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F10136
F10536
F10137
F10537
F10136/F10536
F10137/F10537
F10136
modulo-16
F10137
si117
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95H90
Abstract: 95h90 prescaler Fairchild 95H90 I1C90 11C83 8 bit left right shift register 10541 11C90 e104 Fairchild 95H90 10/11
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-ECL E104 11C83 3 — •"4 - E105 10192/10592 M R CP Q • 10 6 - V r e f V cc = Pin 1 V c c a = Pin 14 G N D = Pin 7 V cc = Pin 16 4 V ee = Pin 8 (12) ( ) = Flatpak E106 10177/10577 E107 100181 (MSB)
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11C83
1I1C05
95H91
11C91
95H90
-MO/11
I1C90
105XX
106XX
95H90
95h90 prescaler
Fairchild 95H90
I1C90
11C83
8 bit left right shift register
10541
11C90
e104
Fairchild 95H90 10/11
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bcd counter using j-k flip flop diagram
Abstract: pn sequence generator using jk flip flop F10136 ECL Handbook
Text: / / / F10136 • F10536 • F10137 • F10537 V 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10136/F10536 and F10137/FI 0537 are 4-stage synchronous counters capable of operating at typical count rates of 250 MHz. The circuits are designed
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F10136
F10536
F10137
F10537
F10136/F10536
F10137/FI
F10136
modulo-16
F10137
bcd counter using j-k flip flop diagram
pn sequence generator using jk flip flop
ECL Handbook
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