ecl 10K
Abstract: RCD Components E1001 E1004 E1008 E103 E105 SCHEMAT
Text: PRELIMINARY ECL DIGITAL DELAY LINES - 5-41-5 - ECL 10K INTERFACED - 5-41-5 - ECL 100K INTERFACED FEATURES TYPE E105 - ECL 10K 5 TAP Tap Delay nS 3 20 4 25 5 30 6 2X Total Delay Pulse Spacing 5X Total Delay -1.0V provided by open emitter ECL 10K gate
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100K series ECL
Abstract: No abstract text available
Text: ECL DIGITAL DELAY LINES E10 SERIES - ECL10K INTERFACED E100 SERIES - ECL100K INTERFACED Industry’s widest selection! 5nS - 200nS 500nS avail. Economical cost, prompt delivery Fast 2nSec rise time typical Standard 16 pin DIP on ECL 10K, 24 pin DIP on ECL 100K
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ECL10K
ECL100K
200nS
500nS
ECL10K,
ECL10K
ECL100K)
FA086
GF-061.
100K series ECL
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eclpw
Abstract: pulse width generator
Text: 10K / 10KH ECL Logic Pulse Width Control Modules Electrical Specifications at 25OC Electrical Specifications at 25OC 10KH ECL Pulse Width Generator Modules 10K ECL Pulse Width Generator Modules Maximum Freq. MHz 77.0 67.0 59.0 53.0 48.0 43.0 31.0 23.0 19.0
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ECLPWG-10
ECLPWG-15
ECLPWG-20
ECLPWG-25
ECLPWG-30
ECLPWG-40
ECLPWG-50
ECLPWG-60
ECLPWG-75
ECLPWG-100
eclpw
pulse width generator
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H604
Abstract: MC100H604 MC100H604FN MC10H604 MC10H604FN
Text: MC10H604, MC100H604 Registered Hex TTL to ECL Translator The MC10H/100H604 is a 6–bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL
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MC10H604,
MC100H604
MC10H/100H604
r14525
MC10H604/D
H604
MC100H604
MC100H604FN
MC10H604
MC10H604FN
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PLCC-28
Abstract: H604 MC100H604 MC10H604 MC10H604FN
Text: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock
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MC10H604,
MC100H604
MC10H/100H604
MC10H604/D
PLCC-28
H604
MC100H604
MC10H604
MC10H604FN
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MC10EP58D
Abstract: MC10EP58DR2 SY100EP58V SY10EP58V SY10EP58VZI SY10EP58VZITR
Text: ECL Pro SY10EP58V ECL Pro™ SY100EP58V 3.3V/5V 3GHz PECL/ECL 2:1 MULTIPLEXER Micrel, Inc. SY10EP58V SY100EP58V FEATURES • 2:1 PECL/ECL multiplexer ■ Guaranteed AC–performance over temperature/voltage • >3GHz fMAX toggle • <200ps rise/fall time
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SY10EP58V
SY100EP58V
200ps
420ps
15pspp
SY10/100EP58V
MC10/100EP58D/DT
M9999-070105
MC10EP58D
MC10EP58DR2
SY100EP58V
SY10EP58V
SY10EP58VZI
SY10EP58VZITR
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Untitled
Abstract: No abstract text available
Text: ECL DIGITAL DELAY LINES E10 SERIES - ECL10K INTERFACED E100 SERIES - ECL100K INTERFACED Industry’s widest selection! 5nS - 200nS 500nS avail. Economical cost, prompt delivery Fast 2nSec rise time typical Standard 16 pin DIP on ECL 10K, 24 pin DIP on ECL 100K
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ECL10K
ECL100K
200nS
500nS
ECL10K,
ECL10K
ECL100K)
FA086
GF-061.
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SJ-2800
Abstract: A280X SJ-2800 Series
Text: CRYSTAL CLOCK OSCILLATORS Data Sheet 0012J Rev. E ECL SJ-2800 Series Description The SJ-2800 Series of quartz crystal oscillators provide ECL 10K and 10KH series compatible signals in a ceramic SMD package. Systems designers may now specify space-saving, cost-effective packaged ECL
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0012J
SJ-2800
3000g
50ppm
A280X
100ppm
50ppm
25ppm
20ppm
SJ-2800 Series
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SJ-2820
Abstract: No abstract text available
Text: CRYSTAL CLOCK OSCILLATORS Data Sheet 0013A Rev. E ECL SJ-2820 Series Description The SJ-2820 Series of quartz crystal oscillators provide ECL 10K and 10KH series compatible signals in a ceramic SMD package. Systems designers may now specify space-saving, cost-effective packaged ECL
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SJ-2820
3000g
50ppm
A282X
100ppm
50ppm
25ppm
20ppm
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AN1002
Abstract: MC100EL91 MC100LVEL91 SK100EL91W SK100EL91WD SK100EL91WDT SK100EL91WU
Text: SK100EL91W Triple PECL to ECL/LVECL and LVPECL to ECL/LVECL Translator PRELIMINARY TEST AND MEASUREMENT PRODUCTS Description Features The SK100EL91W is a triple PECL to ECL/LVECL and LVPECL to ECL/LVECL translator. It is fully compatible with MC100EL91 and MC100LVEL91. The SK100EL91W
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SK100EL91W
SK100EL91W
MC100EL91
MC100LVEL91.
EL91W
SK100EL91WD
20-SOIC
SK100EL91WDT
AN1002
MC100LVEL91
SK100EL91WD
SK100EL91WDT
SK100EL91WU
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H604
Abstract: MC100H604 MC10H604 MC10H604FN
Text: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock
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MC10H604,
MC100H604
MC10H/100H604
MC10H604/D
H604
MC100H604
MC10H604
MC10H604FN
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H604
Abstract: MC100H604 MC10H604 MC10H604FN
Text: MC10H604, MC100H604 Registered Hex TTL to ECL Translator Description The MC10H/100H604 is a 6−bit, registered, dual supply TTL to ECL translator. The device features differential ECL outputs as well as a choice between either a differential ECL clock input or a TTL clock
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MC10H604,
MC100H604
MC10H/100H604
MC10H604/D
H604
MC100H604
MC10H604
MC10H604FN
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Untitled
Abstract: No abstract text available
Text: bel ACTIVE DELAY LINES cont. Style ECL ECt ECL ECL ECL ECL ECL ECL ECL ECL ECL ECL ECL 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap 10K H 5 Tap 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap 10KH 5 Tap ECL ECL ECL ECL ECL ECL
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S459-0006-02
S459-0010-02
S459-0015-02
S459-0020-02
S459-0025-02
S459-0030-02
S459-0035-02
S459-0040-02
S459-0045-02
S459-0050-02
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ecl 10K
Abstract: e103 resistor 603 dip ECL-10K E1001 series ecl10k
Text: ECL DIGITAL DELAY LINES SERIES E10 - ECL 10K INTERFACED SERIES E100 - ECL 100K INTERFACED TEST CONDITIONS @25°C • ■ ■ ■ ■ ■ Industry’s widest selection! Economical cost, prompt delivery Fast 2nSec rise time typical Standard 16 pin DIP on ECL 10K, 24 pin DIP on ECL 100K
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100fi
ECL10K
E1008
ECL100K
E1001
E1004
ecl 10K
e103 resistor
603 dip
ECL-10K
E1001 series
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Untitled
Abstract: No abstract text available
Text: ECL DIGITAL DELAY LINES SERIES E10 - ECL 10K INTERFACED SERIES E100 - ECL 100K INTERFACED TEST CONDITIONS @25°C • ■ ■ ■ ■ ■ Industry’s widest selection! Economical cost, prompt delivery Fast 2nSec rise time typical Standard 16 pin DIP on ECL 10K, 24 pin DIP on ECL 100K
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ECL10K
E1004
ECL100K
100MX
400MX
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Untitled
Abstract: No abstract text available
Text: ECL DIGITAL DELAY LINES SERIES E10 - ECL 10K INTERFACED SERIES E100 - ECL 100K INTERFACED TEST CONDITIONS @25°C • ■ ■ ■ ■ ■ Industry’s widest selection! Economical cost, prom pt delivery Fast 2nSec rise tim e typical Standard 16 pin DIP on ECL 10K, 24 pin DIP on ECL 100K
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TECL10K
E1008
ECL100K
ECL10K
E1001
E1004
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2b514
Abstract: No abstract text available
Text: DATATRONICS SbE D • 2b51462 OOOQEbl 2 ■ ' T ~ ± l - \ <1 SERIES EL519 ECL (10K COMPATIBLE PROGRAMMABLE DELAY MODULES (8-BIT) • • 8-Bit ECL Programmable Delay Line * 4 8 Pin DIP Package ECL Input and Output Levels • 7 0 ECL DC Fan-out Capacity
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2b51462
EL519
925mW
2b514
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Untitled
Abstract: No abstract text available
Text: ECL DIGITAL DELAY LINES RESISTORS •CAPS » COILS •DELAY U NES E10 SERIES - ECL10KINTERFACED E100 SERIES - ECL 100K INTERFACED FEATURES □ Industry’s widest selection! □ Economical cost, prompt delivery □ Fast 2nSec rise time typical □ Standard 16 pin DIP on ECL 10K, 24 pin DIP on ECL 100K
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ECL10KINTERFACED
dow00K
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Untitled
Abstract: No abstract text available
Text: ECL Surface-Mount Delay Modules ► 10k ECL logic levels. 10k ECL Programmable Delay Modules Part No. GECLPG301MX GECLPG302MX GECLPG303MX GECLPG304MX GECLPG305MX GEGLPG306MX GECLPG307MX GECLPG308MX GECLPG309MX GECLPG310MX Step Delay ns ± ns Max. Delay ns ± ns
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GECLPG301MX
GECLPG302MX
GECLPG303MX
GECLPG304MX
GECLPG305MX
GEGLPG306MX
GECLPG307MX
GECLPG308MX
GECLPG309MX
GECLPG310MX
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b765
Abstract: PAL 008 PAL10016RD8 PAL1016RD8
Text: PRELIMINARY September 1986 ECL Registered and Latched Programmable Array Logic PAL Family General Description The registered and latched ECL PAL devices are the latest additions to National Semiconductor's ECL PAL family. The ECL PAL family utilizes National Semiconductor's advanced
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2-26A
AA32096
b765
PAL 008
PAL10016RD8
PAL1016RD8
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Untitled
Abstract: No abstract text available
Text: DP8480 10K ECL-TO-TTL LEVEL TRANSLATOR WITH LATCH SLLS035B - D3058, NOVEMBER 1987 - REVISED FEBRUARY 1993 * ECL Control Inputs * 3-State Outputs N PACKAGE TOP VIEW * 10K ECL Input Compatible v Ee * Direct Replacement for National Semiconductor DP8480 [ 1
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DP8480
SLLS035B
D3058,
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signal path designer
Abstract: No abstract text available
Text: PRELIMINARY DEVICE SPECIFICATION Q20000 SERIES ECL/TTL TURBO" LOGIC ARRAYS 020000 FEATURES • Up to 24000 gates, channelless architecture • 100ps equivalent gate delays • Ultra low power ,5-1.0mW/gate • 10K, 10KH, 100K ECL and mixed ECL/TTL capability
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Q20000
100ps
SA/D1203-1089
signal path designer
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DP8480
Abstract: D3058
Text: DP8480 10K ECL-TO-TTL LEVEL TRANSLATOR WITH LATCH SLLS035B - D3058, N OVEMBER 1987 - REVISED FEBRUARY 1993 ECL Control Inputs 3-State Outputs 10K ECL Input Compatible N PACKAGE fTOP VIEW Ve e [ 1 DO [ 2 Direct Replacement for National Semiconductor DP8480
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DP8480
SLLS035B
D3058,
D3058
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ecl pal
Abstract: No abstract text available
Text: ECL PAL10/10016RD8 National iD I Semiconductor PAL10/10016RD8 ECL Registered Programmable Array Logic General Description The registered ECL PAL10/10016RD8 is offered in 10KH or 100K compatible versions. A maximum propagation delay of 6 ns input to output characterizes the performance of this
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PAL10/10016RD8
PAL10/10016RD8
ecl pal
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