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    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET 256M bits SDRAM Bare Chip ECS2532CACN-A 8M words x 32 bits Specifications Features • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: Bare chip • Power supply: VDD, VDDQ = 2.5V ± 0.2V • Clock frequency: 133MHz (max.)


    Original     		PDF ECS2532CACN-A 133MHz cycles/64ms M01E0107 E0551E30

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET 256M bits SDRAM Bare Chip ECS2532CACN-A 8M words x 32 bits Features • Density: 256M bits • Organization ⎯ 2M words × 32 bits × 4 banks • Package: Bare chip • Power supply: VDD, VDDQ = 2.5V ± 0.2V • Clock frequency: 133MHz (max.)


    Original     		PDF ECS2532CACN-A 133MHz cycles/64ms M01E0107 E0551E30