LS112A
Abstract: ALS112A
Text: DOT A VG Semiconductors 112 Technical Data Dual JK Negative Edge-Triggered Flip-Flops DV74LS112A DV74ALS112A N Suffix Plastic DIP AVG -003 Case This device contains two individual J. K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock pulse goes
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DV74LS112A
DV74ALS112A
AVG-003
AVG-004
1-800-AVG-SEMI
DV74LS112A,
LS112A
ALS112A
LS112A
ALS112A
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Untitled
Abstract: No abstract text available
Text: AVG Semiconductors_ DDiT 112 Technical Data Dual JK Negative Edge-Triggered Flip-Flops DV74LS112A PV74ALS112A N Suffix Plastic DIP AVG-003 Case This device contains two individual J, K, clock, and asynchronous set and clear inputs to each flip-flop. When the clock pulse goes
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OCR Scan
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PDF
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DV74LS112A
PV74ALS112A
AVG-003
1-800-AVG-SEMI
DV74LS112A,
DV74ALS112A
LS112A
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