LBK3
Abstract: TXC-03375-AIPQ TXC-03375-BIPQ
Text: M12 Device DS2/DS1 Mux/Demux TXC-03375 DATA SHEET Preliminary FEATURES DESCRIPTION • Multiplexes four DS1 signals into one DS2 signal The M12 DS2/DS1 Mux/Demux device complies with all ANSI and Bellcore requirements for signalling and control operations. The incoming DS2 signal is framed in
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TXC-03375
TXC-03375-MB
LBK3
TXC-03375-AIPQ
TXC-03375-BIPQ
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YAMAHA
Abstract: YAMAHA RA 200 surge absorber yamaha 40 YTD418 YTD423 YTD428 "Phantom power"
Text: Y-DS2 Built-in DSU Module for Terminal Equipment 1 General Y-DS2 is designed to be installed in terminal equipment, conforming to TTC Standard JT-I430 and JT-G961. Y-DS2 provides the ISDN subscriber interface two-wire time compression multiplexing operation and the
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JT-I430
JT-G961.
YTD418
YTD423.
CA95112
YAMAHA
YAMAHA RA 200
surge absorber
yamaha 40
YTD423
YTD428
"Phantom power"
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AUTO INDICATOR MONITOR 321 099
Abstract: zl30410qcc
Text: ZL30410 Multi-service Line Card PLL Data Sheet Features • • • • • • • • • March 2006 Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 DS2 , E1 and DS1 interfaces
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ZL30410
GR-253-CORE
70x10
GR-1244
GR-12y
AUTO INDICATOR MONITOR 321 099
zl30410qcc
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C155
Abstract: C155N C155P GR-1244 GR-253-CORE ZL30410 ZL30410QCC
Text: ZL30410 Multi-service Line Card PLL Data Sheet Features • • • • • • • • • November 2003 Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 DS2 , E1 and DS1 interfaces
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ZL30410
GR-253-CORE
70x10
GR-1244
C155
C155N
C155P
GR-1244
ZL30410
ZL30410QCC
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C155
Abstract: C155N C155P GR-1244 GR-253-CORE ZL30410 ZL30410QCC ZL30410QCG1
Text: ZL30410 Multi-service Line Card PLL Data Sheet Features • • • • • • • • • November 2006 Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 DS2 , E1 and DS1 interfaces
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ZL30410
GR-253-CORE
70x10
GR-1244
C155
C155N
C155P
GR-1244
ZL30410
ZL30410QCC
ZL30410QCG1
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C155
Abstract: C155N C155P GR-1244 GR-253-CORE ZL30410 ZL30410QCC
Text: ZL30410 Multi-service Line Card PLL Data Sheet Features • • • • • • • • • November 2003 Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 DS2 , E1 and DS1 interfaces
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ZL30410
GR-253-CORE
70x10
GR-1244
C155
C155N
C155P
GR-1244
ZL30410
ZL30410QCC
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Untitled
Abstract: No abstract text available
Text: ZL30410 Multi-service Line Card PLL Data Sheet Features • • • • • • • • • November 2003 Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 DS2 , E1 and DS1 interfaces
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ZL30410
GR-253-CORE
70x10
GR-1244
GR-12lude
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Untitled
Abstract: No abstract text available
Text: Product Brief Supermapper 155/51 Mbits/s SONET/SDH x DS3/DS2/DS1/E1/DS0 Overview F e at u r e s Signal interfaces: n — One STS-3/STM-1 port MSP 1 + 1 switch capability . — One DS3 interface or STS-1 Interface. — DS2 Interface available. — Up to x28/21DS1/E1 interfaces.
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PRBS15,
PRBS20,
PRBS23,
16-bit
PB06-045MPIC
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ZL30410QCC
Abstract: C155 C155N C155P GR-1244 GR-253-CORE ZL30410 ZL30410QCG1 AUTO INDICATOR MONITOR 321 099
Text: ZL30410 Multi-service Line Card PLL Data Sheet Features • • • • • • • • • November 2006 Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 DS2 , E1 and DS1 interfaces
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ZL30410
GR-253-CORE
70x10
GR-1244
ZL30410QCC
C155
C155N
C155P
GR-1244
ZL30410
ZL30410QCG1
AUTO INDICATOR MONITOR 321 099
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Untitled
Abstract: No abstract text available
Text: ZL30410 Multi-service Line Card PLL Data Sheet Features • • • • • • • • • July 2003 Generates clocks for OC-3, STM-1, DS3, E3, DS2, DS1, E1, 19.44 MHz and ST-BUS Meets jitter generation requirements for STM-1, OC-3, DS3, E3, J2 DS2 , E1 and DS1 interfaces
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ZL30410
GR-253-CORE
70x10
GR-1244
GR-12lude
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zkb 421
Abstract: MUNICH32 ZKB402 FRC FEMALE sfw 10,7 sfw 10.7 ma v110 ITP03487 zkb_402 i82596
Text: ICs for Communications Multichannel Network Interface Controller for HDLC MUNICH32 PEB 20320 Version 3.4 User’s Manual 01.2000 DS3 • PEB 20320 Revision History: Current Version: 01.2000 Previous Version: User’s Manual 1998-06-01 DS2 V3.4 Page (in previous
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MUNICH32
P-TQFP-176-1
zkb 421
MUNICH32
ZKB402
FRC FEMALE
sfw 10,7
sfw 10.7 ma
v110
ITP03487
zkb_402
i82596
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Multicomp
Abstract: No abstract text available
Text: Fuse Holder In-L Line Specifications Cable Size mm2 Voltage Rating (V) Temperature Rating (°C) 1.0 to 2.0 Fusible Blade Automotive Only 32 105 Maximum Diameter Quantity Per Pack Over Cable Insulation (Pieces) 3.68 25 Part Number DS2/FT Dimensions : Millimetres
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Lucent SLC 2000 channel shelf
Abstract: transistor fcs 9013 Lucent SLC 2000 installation sts 9013 DIGRAM FOR TEST IC 324 fcs 9013 fcs 9014 J-D4N SLC 500 ELECTRONIC CIRCUIT DIGRAM transistor fcs 9012
Text: Preliminary Data Sheet, Rev. 1 October 2000 TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 Features • Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, T1/E1/J1, and DS0/E0/J0 applications. STS/STM Pointer Interpreter
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TMXF28155
x28/x21
DS01-014PDH
DS99-197PDH)
Lucent SLC 2000 channel shelf
transistor fcs 9013
Lucent SLC 2000 installation
sts 9013
DIGRAM FOR TEST IC 324
fcs 9013
fcs 9014
J-D4N
SLC 500 ELECTRONIC CIRCUIT DIGRAM
transistor fcs 9012
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Untitled
Abstract: No abstract text available
Text: Rev: 103008 DS2 6 5 1 8 8 -Port T 1 /E1 /J 1 T ra nsc e ive r _ General Description _ Features The DS26518 is an 8-port framer and line interface unit LIU combination for T1, E1, J1 applications. Each port is independently configurable, supporting
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DS26518
DS26518
DS26514.
DS26528
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DIODE marking S6 89
Abstract: VBUS054A-DS2 vishay diode MARKING s6
Text: VBUS054A-DS2 Vishay Semiconductors 4-line BUS-port ESD-protection Features • Ultra compact LLP70 package • 4-Line USB ESD-protection e3 • high surge current: IPPM = 20 A at 8/20 µs acc. IEC 61000-4-5 • Low leakage current • Low load capacitance CD < 3 pF
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VBUS054A-DS2
LLP70
2002/95/EC
2002/96/EC
LLP70-6E
08-Apr-05
DIODE marking S6 89
VBUS054A-DS2
vishay diode MARKING s6
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MUNICH256 - PEB 20256
Abstract: 20256 ram munich256 hdlc PEF 20256 DD25 MUNICH256 NC20 NC22 NC24 PEF 20256 E
Text: Data Sheet, DS2, April 2001 MUNICH256 Multichannel Network Interface Controller for HDLC/PPP PEB 20256 E Version 2.1 Datacom N e v e r s t o p t h i n k i n g . Edition 04.2001 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany
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MUNICH256
D-81541
MUNICH256 - PEB 20256
20256 ram
munich256 hdlc
PEF 20256
DD25
MUNICH256
NC20
NC22
NC24
PEF 20256 E
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59013 f 331
Abstract: 59012 h 331 59013 h 331
Text: Preliminary Data Sheet 2/06/02 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3/E3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXL28155
x28/x21
456-pin
GR-253-CORE,
GR-499,
TR-62411,
JT-G704,
JT-G706,
JT-G707,
JT-I431-a
59013 f 331
59012 h 331
59013 h 331
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LT 7659
Abstract: w20338 comcode 105 736 490 JT-G706 TMXF28155 TR-62411 GR-253-CORE JT-G704 1 into 12 demultiplexer circuit diagram 80212 502
Text: Data Sheet June 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXF28155
x28/x21
GR-253-CORE,
GR-499,
TR-62411,
JT-G704,
JT-G706,
JT-G707,
JT-I431-a,
DS02-103BBAC-1
LT 7659
w20338
comcode 105 736 490
JT-G706
TR-62411
GR-253-CORE
JT-G704
1 into 12 demultiplexer circuit diagram
80212 502
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59013 h 331
Abstract: 59014 c 331 comcode 105 736 490 fcs 9013 GR-253-CORE JT-G704 JT-G706 TMXL28155 TR-62411 59014 c
Text: Preliminary Data Sheet, Rev 2 June, 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXL28155
x28/x21
Monitor0-712-4106)
DS01-298BBAC-2
DS01-298BBAC-1)
59013 h 331
59014 c 331
comcode 105 736 490
fcs 9013
GR-253-CORE
JT-G704
JT-G706
TR-62411
59014 c
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet, Rev 1 March 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXL28155
x28/x21
GR-253-CORE,
GR-499,
TR-62411,
JT-G704,
JT-G7010-712-4106)
DS01-298BBAC-1
DS01-298BBAC)
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stm cl-30
Abstract: THSC2 LT 7659 psb 500-1.0 highway speed checker data sheet transistor 9012 SDH 209 ses 554 transistor fcs 9012 70010 FB
Text: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXF28155
x28/x21
GR-253-CORE,
GR-499,
TR-62411,
JT-G704,
JT-G706,
JT-G707,
x28/x21
TFRA28J133BAL-1
stm cl-30
THSC2
LT 7659
psb 500-1.0
highway speed checker
data sheet transistor 9012
SDH 209
ses 554
transistor fcs 9012
70010 FB
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Untitled
Abstract: No abstract text available
Text: Data Sheet March 2002 TMXF28155 Supermapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, T1/E1/J1, and DS0/ E0/J0 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXF28155
x28/x21
GR-253-CORE,
GR-499,
TR-62411,
JT-G704,
JT-G706,
JT-G7010-712-4106)
DS02-103BBAC
DS01-264BBAC-1)
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transistor fcs 9012
Abstract: fcs 9012 fcs 9013 fcs 9014 transistor fcs 9013 4-bit even parity checker circuit diagram 9012 9013 frequency to voltage converters asp 962 data sheet transistor 9012 LT 7659
Text: Preliminary Data Sheet, Rev 1 March 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.
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TMXL28155
x28/x21
GR-253-CORE,
GR-499,
TR-62411,
JT-G704,
JT-G706,
JT-10-712-4106)
DS01-298BBAC-1
DS01-298BBAC)
transistor fcs 9012
fcs 9012
fcs 9013
fcs 9014
transistor fcs 9013
4-bit even parity checker circuit diagram
9012 9013 frequency to voltage converters
asp 962
data sheet transistor 9012
LT 7659
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n41 ol
Abstract: D200F
Text: M 12 Device DS2/DS1 M ux /D em ux TXC-03375 DATA SH EE T Preliminary FEATURES DESCRIPTION • Multiplexes four DS1 signals into one DS2 signal The M12 DS2/DS1 Mux/Demux device complies with all ANSI and Bellcore requirements for signalling and con trol operations. The incoming DS2 signal is framed in
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OCR Scan
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TXC-03375
TXC-03375-M
n41 ol
D200F
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