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    DS1010 EQUIVALENT Search Results

    DS1010 EQUIVALENT Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMP89FS60AUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/LQFP64-P-1010-0.50E Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS63AUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/LQFP52-P-1010-0.65 Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS60BFG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/P-LQFP64-1414-0.80-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS63BUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/P-LQFP52-1010-0.65-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS62AUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/LQFP44-P-1010-0.80A Visit Toshiba Electronic Devices & Storage Corporation

    DS1010 EQUIVALENT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74ls gate symbols

    Abstract: 74FO4 pin diagram of 74LS "Delay Lines" 74ls series 74LS SERIES cmos logic data DS1010-60 74LS series datasheet 74ls series logic DS1010-200
    Text: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater


    Original     		PDF DS1010 10-Tap 14-pin 16-pin DS1010 74FO4 74ls gate symbols 74FO4 pin diagram of 74LS "Delay Lines" 74ls series 74LS SERIES cmos logic data DS1010-60 74LS series datasheet 74ls series logic DS1010-200

    74LS

    Abstract: DS1010 DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S ds1010-500
    Text: DS1010 DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN1 1 14 VCC NC 2 13 TAP 1 IN 1 16 VCC TAP 2 3 12 TAP 3 NC 2 15 NC • Leading and trailing edge accuracy TAP 4 4 11 NC TAP 2 3 14 TAP 5 TAP 1 • Delay tolerance ±5% or ±2 ns, whichever is greater


    Original     		PDF DS1010 10-Tap 14-pin 16-pin 74FO4 74LS DS1010 DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S ds1010-500

    74FO4

    Abstract: ds1010-100 74LS DS1010 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80
    Text: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile


    Original     		PDF DS1010 10-Tap 14-pin 16-pin DS1010 300-mil) 74FO4 ds1010-100 74LS DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80

    ISPPAC-CLK5312S-01TN48I

    Abstract: ISPPAC-CLK5308S-01TN48I 5304S DS1010 LVCMOS25 LVCMOS33 clk5304 ISPPAC-CLK5308 DS10100 clk5312s
    Text: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended October 2007 Preliminary Data Sheet DS1010 Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations •


    Original     		PDF 5300S DS1010 ispClock5316S ispClock5320S ispClock5300S ISPPAC-CLK5312S-01TN48I ISPPAC-CLK5308S-01TN48I 5304S DS1010 LVCMOS25 LVCMOS33 clk5304 ISPPAC-CLK5308 DS10100 clk5312s

    DS1010-500

    Abstract: 56-G4009-001B 74FO4 DS1010-125
    Text: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile


    Original     		PDF DS1010 10-Tap 14-pin 16-pin 300-mil) DS1010S DS1010S-250 DS1010-500 56-G4009-001B 74FO4 DS1010-125

    VK 5308

    Abstract: 5308S 5304S IC
    Text: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended October 2006 Preliminary Data Sheet DS1010 Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations •


    Original     		PDF 5300S DS1010 ispClock5316S ispClock5320S VK 5308 5308S 5304S IC

    Untitled

    Abstract: No abstract text available
    Text: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended June 2006 Preliminary Data Sheet DS1010 Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations • •


    Original     		PDF 5300S DS1010

    ds1010-100

    Abstract: 74LS DS1010 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S
    Text: DS1010 10-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile


    Original     		PDF DS1010 10-Tap 14-pin 16-pin DS1010 300-mil) 74FO4 ds1010-100 74LS DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S

    4SO16

    Abstract: 74FO4 74LS Series IC list DS1110-500 DS1110-50 74LS DS1010 DS1110 DS1110E J-STD-020A
    Text: Rev 1; 11/03 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 16-pin SO or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of ±5% or ±2ns,


    Original     		PDF 10-Tap DS1110 DS1010. 500ns. 16-pin 14-pin DS1110 DS1110S 4SO16 74FO4 74LS Series IC list DS1110-500 DS1110-50 74LS DS1010 DS1110E J-STD-020A

    DS1110-500

    Abstract: 74LS DS1010 DS1110 DS1110E J-STD-020A
    Text: Rev 0; 6/02 10-Tap Silicon Delay Line The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 14-pin DIP, 16-pin SO, or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of


    Original     		PDF 10-Tap DS1110 DS1010. 500ns. 14-pin 16-pin DS1110-500 74LS DS1010 DS1110E J-STD-020A

    ds1214

    Abstract: dallas ds1280 DS1666 PRODUCT CHANGE NOTICE DS2013 DS1666-50 DS1667-100 DS1666 DS2011 DS1003 DS1007
    Text: DALLAS SEMICONDUCTOR 4401 South Beltwood Parkway Dallas, Texas 75244-3292 972 371-4000 Date: 11/4/97 Subject: PRODUCT CHANGE NOTICE - J70201 Description: New Passivation Deposition Equipment


    Original     		PDF J70201 DS1003 DS1214 DS1292 DS1667-100 DS2013 DS21A81 DS1007 DS1218 DS12S85 ds1214 dallas ds1280 DS1666 PRODUCT CHANGE NOTICE DS2013 DS1666-50 DS1667-100 DS1666 DS2011 DS1003 DS1007

    74LS

    Abstract: DS1010 DS1010-50 DS1010-60 DS1010-75 DS1010G DS1010S
    Text: DS1010 DALLAS SEMICONDUCTOR DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 10 taps equally spaced C 1 NcC 2 in • Delays are stable and precise • Leading and trailing edge accuracy ncE 3 TAP 2 [I 4 • Delay tolerance ±5% or ±2 ns, whichever is greater


    OCR Scan     		PDF DS1010 10-Tap 14-pin 16-pin DS1010 DS10HOD 74F04 74LS DS1010-50 DS1010-60 DS1010-75 DS1010G DS1010S

    Untitled

    Abstract: No abstract text available
    Text: DS1010 DALLAS SEMICONDUCTOR DS1010 10-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 10 taps equally spaced C 1 NcC 2 in • Delays are stable and precise • Leading and trailing edge accuracy ncE 3 TAP 2 [I 4 • Delay tolerance ±5% or ±2 ns, whichever is greater


    OCR Scan     		PDF DS1010 10-Tap 14-pin 16-pin DS1010G

    74LS

    Abstract: DS1010 DS1010-100 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S
    Text: DS1010 10-Tap Silicon Delay Line www.dalsemi.com PIN ASSIGNMENT All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile


    OCR Scan     		PDF DS1010 10-Tap 14-pin 16-pin DS1010 300-mil) DS1010S 74LS DS1010-100 DS1010-125 DS1010-150 DS1010-50 DS1010-60 DS1010-75 DS1010-80

    Untitled

    Abstract: No abstract text available
    Text: DS 1010 DS1010 DALLAS SEMICONDUCTOR 10-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN1 [ " ^3 7 ] vcc • 10 taps equally spaced • Delays are stable and precise NC c ] TAP 1 TAP 2 C ] TAP 3 ] TAP 5 ] TAP 7 TAP 4 C 1 TAP 9 TAP 6 d


    OCR Scan     		PDF DS1010 10-Tap 14-pin 16-pin 1010S 14-PIl

    Untitled

    Abstract: No abstract text available
    Text: 081010 DS1010 DALLAS SEMICONDUCTOR 10-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN1 £ 1 14 ] V CC N C [ 2 13 ] TAP 1 TAP2 C 3 12 ] TAP 3 • Leading and trailing edge accuracy TAP 4 £ 4 11 ] TA P 5 • Delay tolerance ±5% or +2 ns, whichever is greater


    OCR Scan     		PDF DS1010 10-Tap 14-pin 16-pin 74F04

    Untitled

    Abstract: No abstract text available
    Text: DS 1010 DS1010 DALLAS 10 s e m ic o n d u c t o r ~T a P Silicon D elay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN1 £ 1 • 10 taps equally spaced KOI 14 ] Vcc NC[ 2 13 ] TAP 1 in C 1 • Delays are stable and precise TAP 2 ^ 3 12 ] TAP 3


    OCR Scan     		PDF DS1010 14-PIN DS1010G S1010 r-500)

    DS1010

    Abstract: 74LS DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S dip switch data
    Text: DS 1010 DALLAS DS1010 10-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN ASSIGNMENT • All-silicon tim e delay ini r 1 14 V cc NO 2 13 TAP 1 TAP 2 [_ 3 12 TAP 3 4 11 TAP 5 TAP 6 \_ 5 10 TAP 7 TAP 4 6 9 TAP 9 TAP 6 • 10 taps equally spaced • Delays are stable and precise


    OCR Scan     		PDF DS1010 10-Tap 14-pin 16-pin 11central 74F04 DS1010 74LS DS1010-100 DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010S dip switch data

    Untitled

    Abstract: No abstract text available
    Text: DALLAS SEMICONDUCTOR FEATURES D S 10 10 10-Tap Silicon Delay Line PIN A S S IG N M E N T • All-silicon time delay • 10 taps equally spaced • Delays are stable and precise • Leading and trailing edge accuracy • Delay tolerance ±5% or ±2 ns, whichever is greater


    OCR Scan     		PDF 10-Tap 14-pin 16-pin DS1010 74F04

    ic 74138 pin diagram

    Abstract: ic 74138 pin out diagram of 74138 ic pin diagram of ic 74138 DS1000K-25 74138 ic diagram DS1065 DL620 DDU-66-XXX DS1040 equivalent
    Text: Silicon Timed Circuits Fixed delay lines are the core of the Silicon Timed Circuits family. These are all-silicon replacements for hybrid delay lines. The all-silicon delay lines offer a number of advantages over hybrid components: ♦ Increased reliability


    OCR Scan     		PDF DS1013 DS1033 DS1035 DS1023 DS1045 14-Bit DS1040 ic 74138 pin diagram ic 74138 pin out diagram of 74138 ic pin diagram of ic 74138 DS1000K-25 74138 ic diagram DS1065 DL620 DDU-66-XXX DS1040 equivalent

    DS1669 equivalent

    Abstract: DS2011D DS2013 DS1228 DS1666 74F04 DS1640 DS1003-16 DS1003-20 DS1003-33
    Text: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay • Four delayed clock phases from input • Input frequency independent • Precise tap-to-tap delays • Leading and trailing edge precision


    OCR Scan     		PDF DS1003 14-pin DS1003 l413D 0D14415 DS1669 equivalent DS2011D DS2013 DS1228 DS1666 74F04 DS1640 DS1003-16 DS1003-20 DS1003-33

    DS1666

    Abstract: DS2011D 74F04 DS1003 DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M
    Text: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay IN • Four delayed clock phases from input NC • Input frequency independent NC NC • Precise tap-to-tap delays • Leading and trailing edge precision


    OCR Scan     		PDF DS1003 14-pin DS1003 l413D 0D14415 DS1666 DS2011D 74F04 DS1003-16 DS1003-20 DS1003-25 DS1003-33 DS1003-40 DS1003M

    DS1669 equivalent

    Abstract: DS1640
    Text: DS1003 DS1003 DALLAS SEMICONDUCTOR FEATURES 4-Tap Silicon Delay Line for RISC A pplications PIN ASSIGNMENT • All-silicon tim e delay IN • Four delayed clock phases from input NC • Input frequency independent NC NC • Precise tap-to-tap delays • Leading and trailing edge precision


    OCR Scan     		PDF DS1003 14-pin DS1003M l413D 0D14415 DS1669 equivalent DS1640

    DS1640

    Abstract: No abstract text available
    Text: DALLAS s e m ic o n d u c to r DS1625 Digital Thermometer and Thermostat FEATURES PIN ASSIGNMENT • Tem perature m easurem ents require no external com ­ ponents • Measures tem peratures from -5 5 °C to +125°C in 0.5°C increments. Fahrenheit equivalent is -6 7 °F to


    OCR Scan     		PDF DS1625S: DS1202 DS1302 DS1602S DS1620 DS1625S DS1651S DS1652S DS1669S DS1821S DS1640