MAX9263
Abstract: MAX9264 prng IEC ACB symbols PJ 62 SPREAD-SPECTRUM SYSTEM
Text: 19-5644; Rev 1; 3/11 TION KIT EVALUA BLE IL AVA A HDCP Gigabit Multimedia Serial Link Serializer/Deserializer The MAX9263/MAX9264 chipset extends Maxim’s gigabit multimedia serial link GMSL technology to include highbandwidth digital content protection (HDCP) encryption
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MAX9263/MAX9264
MAX9263
MAX9264
MAX9263/MAX9264
prng
IEC ACB symbols
PJ 62
SPREAD-SPECTRUM SYSTEM
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HSP48901
Abstract: HSP48901JC-30
Text: HSP48901 Data Sheet July 2004 FN2459.6 3 x 3 Image Filter Features The Intersil HSP48901 is a high speed 9-Tap FIR Filter which utilizes 8-bit wide data and coefficients. It can be configured as a one-dimensional 1-D 9-Tap filter for a variety of signal processing applications, or as a two
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HSP48901
FN2459
HSP48901
30MHz
HSP48901JC-30
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GO1555
Abstract: 1kv hd 352M GS1524 GS1560A GS9060 iso 5459 GO1525 w058
Text: GS1560A/GS1561 HD-LINX II Dual-Rate Deserializer Key Features Description • SMPTE 292M and SMPTE 259M-C compliant descrambling and NRZI → NRZ decoding with bypass • DVB-ASI 8b/10b decoding • auto-configuration for HD-SDI and SD-SDI • serial loop-through cable driver output selectable as
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GS1560A/GS1561
259M-C
8b/10b
GS1560A
GO1555
1kv hd
352M
GS1524
GS9060
iso 5459
GO1525
w058
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LF3330
Abstract: 200H 201H 202H
Text: LF3330 LF3330 DEVICES INCORPORATED Vertical Digital Image Filter Vertical Digital Image Filter DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 83 MHz Data Rate ❑ 12-bit Data and Coefficients ❑ On-board Memory for 256 Coefficient Sets ❑ LF InterfaceTM Allows All 256
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LF3330
12-bit
16-bit
12-bit,
LF3330
COUT10
COUT11
DIN10
DIN11
200H
201H
202H
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Crossbow
Abstract: S 187 S2024B-6 register file DIN31
Text: DEVICE SPECIFICATION “CROSSBOW” 32 X 32 800 MBIT/S CROSSPOINT SWITCH “CROSSBOW” X 32 800 MBIT/S CROSSPOINT SWITCH BiCMOS PECL 32 CLOCK GENERATOR FEATURES GENERAL DESCRIPTION • Full broadcast switching capability • 32 x 32 crosspoint structure, expandable to 64 x
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400-Mbit/s
196-pin
S2024
Crossbow
S 187
S2024B-6
register file
DIN31
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LF3320
Abstract: LF3320QC12G cf02
Text: LF3320 LF3320 DEVICES INCORPORATED Horizontal Digital Image Filter Horizontal Digital Image Filter DEVICES INCORPORATED FEATURES DESCRIPTION 83 MHz Data Rate 12-bit Data or Coefficients Expandable to 24-bit 32-Tap FIR Filter, Cascadable for More Filter Taps
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LF3320
12-bit
24-bit)
32-Tap
16-bit
CFA11
CFA10
ROUT11
ROUT10
LF3320
LF3320QC12G
cf02
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LF3320
Abstract: lf3320 r CF1-2
Text: LF3320 LF3320 DEVICES INCORPORATED Horizontal Digital Image Filter Horizontal Digital Image Filter DEVICES INCORPORATED FEATURES DESCRIPTION 83 MHz Data Rate 12-bit Data or Coefficients Expandable to 24-bit 32-Tap FIR Filter, Cascadable for More Filter Taps
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LF3320
12-bit
24-bit)
32-Tap
16-bit
3320-R
LF3320
lf3320 r
CF1-2
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SCSI 100 connector datasheet
Abstract: DIN28 working of 5 pin relay 100 pin scsi 100-pin SCSI female connector n type connector female CB-89200-2 DIN24 relay 5 pin Backup output protect
Text: DASP-52064 Isolated 32 D/I & 32 D/O Card Features 32 isolated digital inputs for source type 32 interrupt input I/O digital input 32 isolated digital outputs for sink type 2K battery backup RAM for backup nonvolatile data (only for DASP-52064) One programmable timer and interrupt
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DASP-52064
DASP-52064)
98/NT/2000/XP,
2500VDC
50VDC
36VDC
DIN11
DIN13
DIN15
DIN17
SCSI 100 connector datasheet
DIN28
working of 5 pin relay
100 pin scsi
100-pin SCSI female connector
n type connector female
CB-89200-2
DIN24
relay 5 pin
Backup output protect
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200H
Abstract: 201H 202H LF3330 VB11
Text: LF3330 LF3330 DEVICES INCORPORATED Vertical Digital Image Filter Vertical Digital Image Filter DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 83 MHz Data Rate ❑ 12-bit Data and Coefficients ❑ On-board Memory for 256 Coefficient Sets ❑ LF InterfaceTM Allows All 256
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LF3330
12-bit
16-bit
12-bit,
LF3330
COUT10
COUT11
DIN10
DIN11
200H
201H
202H
VB11
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AFE8405
Abstract: AFE8405IZDQ CDMA2000-1X
Text: AFE8405 14-BIT, 85-MSPS, SINGLE-ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS212 – OCTOBER 2008 1 Introduction 1.1 FEATURES • • • • • • • • 14-Bit 85-MSPS High-Performance Single ADC At fin = 140 MHz, SNR ≥ 71 dBFS, SFDR ≥ 79 dBc At fin = 70 MHz, SNR ≥ 73 dBFS,
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AFE8405
14-BIT,
85-MSPS,
SLWS212
14-Bit
85-MSPS
18-Bit
AFE8405
AFE8405IZDQ
CDMA2000-1X
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diode code GW 17
Abstract: AFE8406IZDQ b0107 Video sync splitter vga AFE8406 CDMA2000-1X FIFO181 BGA484
Text: AFE8406 14-BIT, 85 MSPS DUAL ADC, 8-CHANNEL WIDEBAND RECEIVER www.ti.com SLWS168C – MAY 2005 – REVISED OCTOBER 2008 1 Introduction 1.1 FEATURES • • • • • • • • • 14-Bit 85-MSPS High-Performance Dual ADC Dual ADC Can Be Configured Into Single ADC
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AFE8406
14-BIT,
SLWS168C
14-Bit
85-MSPS
18-Bit
diode code GW 17
AFE8406IZDQ
b0107
Video sync splitter vga
AFE8406
CDMA2000-1X
FIFO181
BGA484
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LF3320
Abstract: LF3321
Text: LF3321 Horizontal Digital Image Filter DEVICES INCORPORATED Improved Performance FEATURES Selectable 16-bit Data Output with UserDefined Rounding and Limiting Supports Interleaved Data Streams Supports Decimation up to 16:1 for Increasing Number of Filter Taps
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LF3321
16-bit
12-bit
24-bit)
32-Tap
12-bit,
CFA11
CFA10
ROUT11
ROUT10
LF3320
LF3321
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HSP48908
Abstract: HSP48908GC-20 HSP48908GC-32 HSP48908JC-20 HSP48908JC-32 HSP48908VC-20 HSP48908VC-32
Text: HSP48908 TM Data Sheet May 1999 FN2456.5 Two Dimensional Convolver Features The Intersil HSP48908 is a high speed Two Dimensional Convolver which provides a single chip implementation of a video data rate 3 x 3 kernel convolution on two dimensional data. It eliminates the need for external data storage through
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HSP48908
FN2456
HSP48908
32MHz
HSP48908GC-20
HSP48908GC-32
HSP48908JC-20
HSP48908JC-32
HSP48908VC-20
HSP48908VC-32
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S2002
Abstract: S2004 S2018 S2062 S2064
Text: DEVICE SPECIFICATION 17 X 17 3.2 GBIT/S DIFFERENTIAL CROSSPOINT SWITCH 17 X 17 3.2 GBIT/S DIFFERENTIAL CROSSPOINT SWITCH • Microwave or fiber-optic data distribution • High-speed automatic test equipment • Datacom or telecom switching FEATURES •
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D64/R96
S2002
S2004
S2018
S2062
S2064
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MIL-A-8625C
Abstract: register file
Text: DEVICE SPECIFICATION 1 6 x 1 6 1 . 5 G B IT/S D IF F E R E N T IA L C R O SS PO IN T SW ITCH FEATURES • • • • • • • • • S 2016 GENERAL DESCRIPTION 1 6 x 1 6 differential crosspoint switch Full broadcast switching capability DifferentiaMOK PECL data path
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120-pin
S2016
/DW0045-10
MIL-A-8625C
register file
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Untitled
Abstract: No abstract text available
Text: The ARM Processor Family This Data Sheet is one of a series describing the ARM Family of products from GEC Plessey Semiconductors. The table below shows the current range of 32-bit RISC M icroprocessors/M icrocontrollers. GPS Name P ackag e Description 32 bit RISC core with 32 bit address range.
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32-bit
100PQFP
144TQFP
160PQFP
ser26
FIQ26
1RQ26
upervisor26.
37bfl522
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ADSP-3221
Abstract: No abstract text available
Text: ANALOG DEVICES High Speed 64-Bit IEEE Floating-Point ALU ADSP-3221 1.1 Scope. This specification covers the detail requirements for a CMOS monolithic 32-bit and 64-bit IEEE Standard 754 format floating-point arithmetic and logic unit ALU . 1.2 Part Number.
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64-Bit
ADSP-3221
32-bit
ADSP-3221
SG/883B
ADSP-3221TG/883B
ADI-M-1000:
G-144A.
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Untitled
Abstract: No abstract text available
Text: HSP48908/883 33 Two Dimensional Convolver January 1994 Description Features • The Harris HSP48908/883 is a high speed Two Dimensional Convolver which provides a single chip implementation of a video data rate 3 x 3 kernel convolution on two dimensional data. It eliminates the need for external data storage through
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HSP48908/883
HSP48908/883
MIL-STD883
DOUT10
DOUT11
DOUT12
OOUT13
DOUT14
CASI12
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Untitled
Abstract: No abstract text available
Text: Advance Information S E M I C O N D U C T O R S _ MUAA Routing C o processor RCP Fam ily APPLICATION BENEFITS > > > > > > High performance MAC Address processor for multiport switches and routers (Up to 48 10/100 or 4 Gigabit Ethernet at wire speed)
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Untitled
Abstract: No abstract text available
Text: JJPD485506 Line Buffer for Communications Systems NEC Electronics Inc. Description Pin Configurations The /j PD485506 is a 5048-w ord by 16-bit d ual-port line buffer fab ric a te d w ith a silicon-gate CM OS process. T he device is capab le of asynchronous read and w rite
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JJPD485506
PD485506
5048-w
16-bit
44-Pin
iPD485506
OUT11
OUT12
DOUT13
DOUT14
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K3192
Abstract: No abstract text available
Text: DEVICE SPECIFICATION > FEATURES 4 M C C GENERAL DESCRIPTION 33 x 32 differential crosspoint switch Full broadcast switching capability Differential 10K PECL data path Configurable differential output driver controls Up to 1.25 Gbit/s NRZ data rate TTL configuration controls
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224-pin
S2028
1998/Revision
K3192
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SS2024
Abstract: 3111z
Text: DEVICE SPECIFICATION CROSSBOW” 32 X 32 800 MBIT/S CROSSPOINT SWITCH GENERAL DESCRIPTION FEATURES • Full broadcast switching capability • 32 x 32 crosspoint structure, expandable to 64 x 64 with no external components • ECL 10K data path and TTL I/O for configuration
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400-Mbit/s
196-pin
S2024
SS2024
3111z
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Untitled
Abstract: No abstract text available
Text: LF48908 Two Dimensional Convolver D E V IC E S IN C O R P O R A T E D DESCRIPTION FEATURES . _ _ □ 40 MHz Data and Computation Rate □ Nine Multiplier Array with 8-bit Data and 8-bit Coefficient Inputs □ Separate Cascade Input and Output Ports □ On-board Programmable Row
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LF48908
HSP48908
MIL-STD-883,
84-pin
100-pin
LF48908
DOUT14DOUT12
CAS114
CASI11
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Untitled
Abstract: No abstract text available
Text: 2 HARRIS Ja n u a ry 1991 Features • Single Chip 3x3 Kernel Convolution • Programmable O n-chip Row Buffers • DC to 32 MHz Clock Rate • Cascadable for Larger Kernels and Images • O n-Chip 8-B it ALU • Dual Coefficient Mask Registers, Switchable in a
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HSP48
HSP48908
32MHz
20MHz
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