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    DM74LS27 Search Results

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    DM74LS27 Price and Stock

    Rochester Electronics LLC DM74LS27MX

    IC GATE NOR 3CH 3-INP 14SOIC
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    DigiKey DM74LS27MX Bulk 2,500 987
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    onsemi DM74LS27N

    IC GATE NOR 3CH 3-INP 14MDIP
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    onsemi DM74LS279N

    IC LATCH QUAD S/R 16-DIP
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    onsemi DM74LS273N

    IC FF D-TYPE SNGL 8BIT 20DIP
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    Rochester Electronics LLC DM74LS279M

    R-S LATCH, LOW LEVEL TRIGGERED
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    DigiKey DM74LS279M Bulk 2,219
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    Find more DM74LS27 price and stock on Findchips.com

    DM74LS27 Datasheets (46)

    Part ECAD Model Manufacturer Description Curated Type PDF
    DM74LS27 Fairchild Semiconductor Triple 3-Input NOR Gate Original PDF
    DM74LS27 Fairchild Semiconductor Triple 3-Input NOR Gates Original PDF
    DM74LS27 National Semiconductor Triple 3-Input NOR Gates Original PDF
    DM74LS27 Unknown TTL Data Book 1980 Scan PDF
    DM74LS273 Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273 Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273 National Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273CW Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273M National Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273M Fairchild Semiconductor 8-Bit Register with Clear Scan PDF
    DM74LS273N Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273N National Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273N Fairchild Semiconductor 8-Bit Register with Clear Scan PDF
    DM74LS273N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM74LS273NX Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273SJ Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273SJX Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273WM Fairchild Semiconductor 8-Bit Register with Clear Original PDF
    DM74LS273WM Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM74LS273WMX Fairchild Semiconductor 8-Bit Register with Clear Original PDF

    DM74LS27 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    LS279

    Abstract: 54LS279 54LS279DMQB 54LS279FMQB 54LS279LMQB DM54LS279 DM54LS279J DM74LS279 DM74LS279M DM74LS279N
    Text: 54LS279 DM54LS279 DM74LS279 Quad S-R Latches General Description The ’LS279 consists of four individual and independent SetReset Latches with active low inputs Two of the four latches have an additonal S input ANDed with the primary S input A low on any S input while the R input is high will be


    Original     		PDF 54LS279 DM54LS279 DM74LS279 LS279 54LS279) 54LS279DMQB 54LS279FMQB 54LS279LMQB DM54LS279J DM74LS279 DM74LS279M DM74LS279N

    DM74LS27

    Abstract: DM54LS27E DM54LS27J DM54LS27W DM74LS27M DM74LS27N E20A J14A M14A
    Text: DM74LS27 Triple 3-Input NOR Gates General Description This device contains three independent gates each of which performs the logic NOR function. Connection Diagram Dual-In-Line Package DS006359-1 Order Number DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M or DM74LS27N


    Original     		PDF DM74LS27 DS006359-1 DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M DM74LS27N DS006359 DM74LS27 DM54LS27E DM54LS27J DM54LS27W DM74LS27N E20A J14A M14A

    Untitled

    Abstract: No abstract text available
    Text: 54LS279,DM54LS279,DM74LS279 54LS279 DM54LS279 DM54LS279 Quad S-R Latches Literature Number: SNOS299A 54LS279 DM54LS279 DM74LS279 Quad S-R Latches General Description to be indeterminate Both inputs are voltage level triggered and are not affected by transition time of the input data


    Original     		PDF 54LS279 DM54LS279 DM74LS279 SNOS299A DM74LS279

    74LS27

    Abstract: DM74LS27 DM74LS27M DM74LS27N M14A MS-001 N14A
    Text: Revised March 2000 DM74LS27 Triple 3-Input NOR Gate General Description This device contains three independent gates each of which performs the logic NOR function. Ordering Code: Order Number Package Number Package Description DM74LS27M M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow


    Original     		PDF DM74LS27 DM74LS27M 14-Lead MS-120, DM74LS27N MS-001, 74LS27 DM74LS27 DM74LS27M DM74LS27N M14A MS-001 N14A

    Untitled

    Abstract: No abstract text available
    Text: DM54LS273,DM74LS273 DM54LS273 DM74LS273 8-Bit Register with Clear Literature Number: SNOS298A DM54LS273 DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register consisting of eight D-type flip-flops with a common Clock and an asynchronous


    Original     		PDF DM54LS273 DM74LS273 DM74LS273 SNOS298A LS273

    Untitled

    Abstract: No abstract text available
    Text: DM54LS273 DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset This device is supplied in a 20pin package featuring 0 3 inch row spacing


    Original     		PDF DM54LS273 DM74LS273 LS273 20pin DM54LS273E DM54LS273J DM54LS273W DM74LS273M

    LS273

    Abstract: DM54LS273 DM54LS273E DM54LS273J DM54LS273W DM74LS273 DM74LS273M DM74LS273N E20A J20A
    Text: DM54LS273 DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset This device is supplied in a 20pin package featuring 0 3 inch row spacing


    Original     		PDF DM54LS273 DM74LS273 LS273 20pin DM54LS273E DM54LS273J DM54LS273W DM74LS273M DM74LS273N C1995 DM54LS273J DM74LS273 DM74LS273N E20A J20A

    DM54LS27

    Abstract: DM54LS27E DM54LS27J DM54LS27W DM74LS27 DM74LS27M DM74LS27N E20A J14A M14A
    Text: DM54LS27 DM74LS27 Triple 3-Input NOR Gates General Description This device contains three independent gates each of which performs the logic NOR function Connection Diagram Dual-In-Line Package TL F 6359 – 1 Order Number DM54LS27J DM54LS27W DM54LS27E DM74LS27M or DM74LS27N


    Original     		PDF DM54LS27 DM74LS27 DM54LS27J DM54LS27W DM54LS27E DM74LS27M DM74LS27N C1995 RRD-B30M105 DM54LS27W DM74LS27 DM74LS27N E20A J14A M14A

    DM74LS273

    Abstract: ls273 DM74LS273N E20A J20A DM54LS273E DM54LS273J DM54LS273W DM74LS273M
    Text: DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch row spacing.


    Original     		PDF DM74LS273 LS273 20-pin DS009825-1 DM54LS273E, DM54LS273J, DM54LS273W, DM74LS273M DM74LS273N DM74LS273 DM74LS273N E20A J20A DM54LS273E DM54LS273J DM54LS273W

    Untitled

    Abstract: No abstract text available
    Text: DM54LS273 DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset This device is supplied in a 20pin package featuring 0 3 inch row spacing


    Original     		PDF DM54LS273 DM74LS273 LS273 20pin DM54LS273E DM54LS273J DM54LS273W DM74LS273M

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a com m on C lock and an asynchronous active LOW M aster Reset. This device is supplied in a 20-pin


    OCR Scan     		PDF DM74LS273 LS273 20-pin DS009825-1 DM54LS273E, DM54ericas

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS27 Triple 3-Input NOR Gates General Description This device contains three independent gates each of which perform s the logic NOR function. Connection Diagram Dual-ln-Line Package Vcc Cl 114 Y1 13 C3 63 11 12 A3 1D L rk 8


    OCR Scan     		PDF DM74LS27 DS006S59-1 DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M DM74LS27N

    74LS279N

    Abstract: 54LS279W of 74ls279
    Text: S E M IC O N D U C T O R tm DM74LS279 Quad S -R Latches and S inputs from lo w to high will cause the Q output to be in­ determ inate. Both inputs are voltage level triggered and are not affected by transition tim e o f th e input data. General Description


    OCR Scan     		PDF DM74LS279 LS279 74LS279N 54LS279W of 74ls279

    LS279

    Abstract: IC DM74LS279N
    Text: LS279 National JümSemiconductor 54LS279/DM54LS279/DM74LS279 Quad S-R Latches General Description to be indeterminate. Both inputs are voltage level triggered and are not affected by transition time of the input data. The ’LS279 consists of four individual and independent SetReset Latches with active low inputs. Two of the four latch­


    OCR Scan     		PDF LS279 54LS279/DM54LS279/DM74LS279 LS279 IC DM74LS279N

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting o f eight D -type flip-flops with a com m on C lock and an asynchronous active LOW M aster Reset. This device is supplied in a 20-pin


    OCR Scan     		PDF DM74LS273 LS273 20-pin DS009825-1 DM54LS273E, DM54L

    ls273

    Abstract: 54LS273F
    Text: LS273 a National Semiconductor 54LS273/DM74LS273 8-Bit Register with Clear General Description Features The 'LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20pin package featuring 0.3 inch row spacing.


    OCR Scan     		PDF LS273 54LS273/DM74LS273 LS273 20pin TL/F/9825-1 54LS273DMQB, 54LS273FMQB, 54LS273LMQB, DM74LS273M DM74LS273N 54LS273F

    IC 54i

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74LS27 Triple 3-Input NOR Gates General Description This device contains three independent gates each of which perform s the logic NOR function. Connection Diagram Dual-ln-Line Package Vcc Cl I» Y1 13 C3 63 11 12 A3 I 1g Y3 g


    OCR Scan     		PDF DM74LS27 DS006359-1 DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M DM74LS27N 14-Lead IC 54i

    Untitled

    Abstract: No abstract text available
    Text: May 1992 DM54LS27/DM74LS27 Triple 3-Input NOR Gates General Description This device contains three independent gates each of which performs the logic NOR function. Connection Diagram Dual-In-Line Package Vcc C1 Y1 C3 B3 A3 Y3 TL/F/6359-1 Order Number DM54LS27J, DM54LS27W,


    OCR Scan     		PDF DM54LS27/DM74LS27 TL/F/6359-1 DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M DM74LS27N TL/F/6359 B30M105/Printed DM54LS27/DM74LS27

    54LS279DMQB

    Abstract: 54LS279FMQB 54LS279LMQB DM54LS279J DM74LS279M DM74LS279N E20A J16A LS279
    Text: & 54LS279/DM54LS279/DM74LS279 Quad S-R Latches General Description The ’LS279 consists of four individual and independent SetReset Latches with active low inputs. Two of the four latch­ es have an additonal S input ANDed with the primary S input. A low on any S input while the R input is high will be


    OCR Scan     		PDF 54LS279/DM54LS279/DM74LS279 LS279 TL/F/6420-1 54LS279DMQB, 54LS279FMQB, 54LS279LMQB, DM54LS279J, DM74LS279M DM74LS 54LS279DMQB 54LS279FMQB 54LS279LMQB DM54LS279J DM74LS279N E20A J16A

    BS011

    Abstract: No abstract text available
    Text: DM54LS273/DM74LS273 8-Bit Register with Clear National Semiconductor DM54LS273/DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous


    OCR Scan     		PDF DM54LS273/DM74LS273 LS273 20pin DM54LS273E, DM54LS273J, DM54LS273W, DM74LS273M BS011

    ls273

    Abstract: 54LS273F
    Text: LS273 NATIONAL SEMICOND -CLOGIO 31E D L.SD1125 D 0 7 G G 3 4 National Semiconductor T-H é>-& ï- 0 5 54LS273/DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting of eight D-type tiip-flops with a common Clock and an asynchronous


    OCR Scan     		PDF LS273 SD1125 54LS273/DM74LS273 LS273 20pin TL/F/9625-1 010102D24 030N0 54LS273DMQB, 54LS273F

    DM74LS27N

    Abstract: No abstract text available
    Text: May 1992 Semiconductor DM54LS27/DM74LS27 Triple 3-Input NOR Gates General Description This device contains three independent gates each of which performs the logic NOR function. Connection Diagram Dual-ln-Line Package T L /F /6 3 5 9 -1 Order Number DM54LS27J, DM54LS27W,


    OCR Scan     		PDF DM54LS27/DM74LS27 TL/F/6359-1 DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M DM74LS27N TL/F/6359 RRD-B30M105/PrintedinU B1-043-299-2309

    DM54LS27E

    Abstract: DM54LS27J DM54LS27W DM74LS27M DM74LS27N E20A J14A M14A N14A
    Text: /* ! National . M ay 1992 Semiconductor DM54LS27/DM74LS27 Triple 3-Input NOR Gates General Description This device contains three independent gates each of w hich perform s th e logic NOR function. Connection Diagram Dual-In-Line Package Vcc C1 114 Y1 13 C3


    OCR Scan     		PDF DM54LS27/DM74LS27 TL/F/6359-1 DM54LS27J, DM54LS27W, DM54LS27E, DM74LS27M DM74LS27N TL/F/6359 DM54LS27E DM54LS27J DM54LS27W E20A J14A M14A N14A

    54LS279

    Abstract: 54LS279DMQB 54LS279FMQB 54LS279LMQB DM54LS279J DM74LS279 DM74LS279M DM74LS279N E20A J16A
    Text: S E M IC O N D U C T O R tm DM74LS279 Quad H -R Latches General Description and S inputs from low to high will cause the Q output to be in­ determ inate. Both inputs are voltage level triggered and are not affected by transition tim e o f th e input data.


    OCR Scan     		PDF DM74LS279 LS279 54LS279) 54LS279 54LS279DMQB 54LS279FMQB 54LS279LMQB DM54LS279J DM74LS279M DM74LS279N E20A J16A