DIGITAL CLOCK ABSTRACT Search Results

DIGITAL CLOCK ABSTRACT Result Highlights (5)

Part	Manufacturer	Description
TB67S539FTG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface
TB67S149AFTG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface
TB67S549FTG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface
TB67S589FTG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / VQFN32
TB67S589FNG	Toshiba Electronic Devices & Storage Corporation	Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / HTSSOP28

DIGITAL CLOCK ABSTRACT Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
maxim adc 16 bit 8 channel Abstract: MAXQ2000-KIT APP4195 MAX1132 MAX1132EVKIT MAXQ2000 digital clock abstract Text: Maxim > App Notes > DIGITAL POTENTIOMETERS Keywords: interface, spi clock, adc, example code, MAXQ2000 Feb 19, 2008 APPLICATION NOTE 4195 Selecting SPI Clock Modes for Interfacing the MAX1132 ADC with the MAXQ2000 Microcontroller By: Kien Mach Abstract: The MAXQ2000 can interface with the MAX1132 using different clock modes: 8-bit, 16-bit, or a	Original	MAXQ2000 MAX1132 MAXQ2000 16-bit, MAX1132. com/an4195 MAX1132: MAXQ2000: maxim adc 16 bit 8 channel MAXQ2000-KIT APP4195 MAX1132EVKIT digital clock abstract	PDF
maxim 1987 Abstract: where to find maxim 1987 APP2744 Spread Spectrum Signal for Digital Communication G80-0200 Text: Maxim > App Notes > HIGH-SPEED INTERCONNECT Keywords: jitter, CLK generator, CLK synthesizer, clock jitter, cycle-to-cycle jitter, clock generators, synthesizers Sep 26, 2003 APPLICATION NOTE 2744 Jitter Measurements for CLK Generators or Synthesizers Abstract: Clock CLK generators and synthesizers form the pulse of a complex digital system and errors in a	Original	com/an2744 AN2744, APP2744, Appnote2744, maxim 1987 where to find maxim 1987 APP2744 Spread Spectrum Signal for Digital Communication G80-0200	PDF
APP2744 Abstract: AN274 lecroy Text: Maxim > App Notes > High-speed interconnect Keywords: jitter, CLK generator, CLK synthesizer, clock jitter, cycle-to-cycle jitter, clock generators, synthesizers Sep 26, 2003 APPLICATION NOTE 2744 Jitter measurements for CLK generators or synthesizers Abstract: Clock CLK generators and synthesizers form the pulse of a complex digital system and errors in a clock's signal	Original	com/an2744 AN2744, APP2744, Appnote2744, APP2744 AN274 lecroy	PDF
str 3234 Abstract: APP4005 DS3234 56F800 AN4005 0X200 0X98 Text: Maxim > App Notes > REAL-TIME CLOCKS Keywords: DS3234, SPI Feb 29, 2008 APPLICATION NOTE 4005 Interfacing a DS3234 Extremely Accurate SPI-Bus Real-Time Clock RTC to a Motorola Digital Signal Processor (DSP) Abstract: This application note provides an example of hardware and software for interfacing an SPI realtime clock (RTC) to a Motorola digital signal processor (DSP) that has a built-in SPI-interface module. This	Original	DS3234, DS3234 com/an4005 DS3234: AN4005, APP4005, Appnote4005, str 3234 APP4005 56F800 AN4005 0X200 0X98	PDF
ARM TZ API Abstract: 7014 troubleshooting W1000 Text: VCE6467T, AVCE6467T www.ti.com SPRS690 – MARCH 2011 VCE6467T, AVCE6467T Digital Media System-on-Chip Check for Samples: VCE6467T, AVCE6467T 1 Digital Media System-on-Chip DMSoC 1.1 Features 12 • High-Performance Digital Media SoC – 1-GHz C64x+ Clock Rate	Original	VCE6467T, AVCE6467T SPRS690 AVCE6467T 128K-Byte ARM926EJ-S 32-Bit ARM TZ API 7014 troubleshooting W1000	PDF
dac 344C Abstract: TCR 1050 a338 tk 1838 1AB3 344C 0950 3C80 philips 8038 ic tester circuit diagram SPRU871 0xC000 h.264 encode Text: VCE6467T, AVCE6467T www.ti.com SPRS690 – MARCH 2011 VCE6467T, AVCE6467T Digital Media System-on-Chip Check for Samples: VCE6467T, AVCE6467T 1 Digital Media System-on-Chip DMSoC 1.1 Features 12 • High-Performance Digital Media SoC – 1-GHz C64x+ Clock Rate	Original	VCE6467T, AVCE6467T SPRS690 500-MHz ARM926EJ-STM 32-Bit dac 344C TCR 1050 a338 tk 1838 1AB3 344C 0950 3C80 philips 8038 ic tester circuit diagram SPRU871 0xC000 h.264 encode	PDF
SCR TAG 665 100 Abstract: BT.1120 Text: VCE6467T, AVCE6467T www.ti.com SPRS690 – MARCH 2011 VCE6467T, AVCE6467T Digital Media System-on-Chip Check for Samples: VCE6467T, AVCE6467T 1 Digital Media System-on-Chip DMSoC 1.1 Features 12 • High-Performance Digital Media SoC – 1-GHz C64x+ Clock Rate	Original	VCE6467T, AVCE6467T SPRS690 AVCE6467T 128K-Byte ARM926EJ-S 32-Bit SCR TAG 665 100 BT.1120	PDF
Untitled Abstract: No abstract text available Text: VCE6467T, AVCE6467T www.ti.com SPRS690 – MARCH 2011 VCE6467T, AVCE6467T Digital Media System-on-Chip Check for Samples: VCE6467T, AVCE6467T 1 Digital Media System-on-Chip DMSoC 1.1 Features 12 • High-Performance Digital Media SoC – 1-GHz C64x+ Clock Rate	Original	VCE6467T, AVCE6467T SPRS690 500-MHz ARM926EJ-Sâ 32-Bit	PDF
vdce Abstract: No abstract text available Text: VCE6467T, AVCE6467T www.ti.com SPRS690 – MARCH 2011 VCE6467T, AVCE6467T Digital Media System-on-Chip Check for Samples: VCE6467T, AVCE6467T 1 Digital Media System-on-Chip DMSoC 1.1 Features 12 • High-Performance Digital Media SoC – 1-GHz C64x+ Clock Rate	Original	VCE6467T, AVCE6467T SPRS690 AVCE6467T 128K-Byte ARM926EJ-S 32-Bit vdce	PDF
01D0 Abstract: No abstract text available Text: TMS320DM6431 Digital Media Processor www.ti.com SPRS342B – NOVEMBER 2006 – REVISED NOVEMBER 2007 1 TMS320DM6431 Digital Media Processor 1.1 Features • • • High-Performance Digital Media Processor DM6431 – 3.33-ns Instruction Cycle Time – 300-MHz C64x+ Clock Rate	Original	TMS320DM6431 SPRS342B DM6431) 33-ns 300-MHz 32-Bit TMS320C64x 32-/40-Bit) 32-Bit, 01D0	PDF
Untitled Abstract: No abstract text available Text: VCE6467T, AVCE6467T www.ti.com SPRS690 – MARCH 2011 VCE6467T, AVCE6467T Digital Media System-on-Chip Check for Samples: VCE6467T, AVCE6467T 1 Digital Media System-on-Chip DMSoC 1.1 Features 12 • High-Performance Digital Media SoC – 1-GHz C64x+ Clock Rate	Original	VCE6467T, AVCE6467T SPRS690 500-MHz ARM926EJ-Sâ 32-Bit	PDF
TMS320C64X dsp schematic Abstract: hdvicp Text: VCE6467T, AVCE6467T www.ti.com SPRS690 – MARCH 2011 VCE6467T, AVCE6467T Digital Media System-on-Chip Check for Samples: VCE6467T, AVCE6467T 1 Digital Media System-on-Chip DMSoC 1.1 Features 12 • High-Performance Digital Media SoC – 1-GHz C64x+ Clock Rate	Original	VCE6467T, AVCE6467T SPRS690 AVCE6467T 128K-Byte ARM926EJ-S 32-Bit TMS320C64X dsp schematic hdvicp	PDF
digital clock abstract Abstract: psk demodulation CRYSTAL 4 MHZ MN88415 bpsk modulation and demodulation carrier recovery PSK digital code lock system 8PSK BLOCK DIAGRAM Text: BS Digital Channel Decoder LSI MN88415 • Abstract MN88415 is a single chip channel decoder LSI for BS / CS digital satellite broadcasting. This LSI includes 2ch ADC and PLL which allows fixed low frequency crystal 4 MHz to generate various clock frequency for BS / CS	Original	MN88415 MN88415 IEEE1149 digital clock abstract psk demodulation CRYSTAL 4 MHZ bpsk modulation and demodulation carrier recovery PSK digital code lock system 8PSK BLOCK DIAGRAM	PDF
AN4402 Abstract: FLUXGATE square wave signal generator charge generator 4402 squarewave generator notes SQUARE WAVE GENERATOR APP4402 MAX1697 MAX1697T DIGITAL FLUXGATE Text: Maxim > App Notes > Oscillators/Delay Lines/Timers/Counters Signal Generation Circuits Keywords: sensors, AC drive, clock signals, inverting charge pump May 19, 2009 APPLICATION NOTE 4402 Square-wave Oscillator Includes No External Components Abstract: Digital systems that are not very demanding about their clock frequency, like multiplexed panel	Original	MAX1697T; com/an4402 MAX1697: AN4402, APP4402, Appnote4402, AN4402 FLUXGATE square wave signal generator charge generator 4402 squarewave generator notes SQUARE WAVE GENERATOR APP4402 MAX1697 MAX1697T DIGITAL FLUXGATE	PDF

CDCV850 Abstract: No abstract text available Text: Application Report SCAA058 –July 2002 HSTL Clock Buffer Using the CDCV850 Falk Alicke TI Clock Solutions, Communication and Control Products ABSTRACT The demand for driving 1.5-V HSTL signals for high-integrated and low-voltage digital logic is increasing. Most current systems use LVDS, LVPECL, or 2.5-V LVCMOS	Original	SCAA058 CDCV850 CDCV850. CDCV850	PDF
electric blanket Abstract: ISO72X digital Isolator interface digital isolator SLLA181A Text: Application Report SLLA267 – September 2007 Digital Isolator E-Field Sensitivity Kevin Gingerich . High-Performance Analog/Interface and Clock Products Introduction The small differential signal circuit used in Texas Instruments digital isolators is immune to external	Original	SLLA267 electric blanket ISO72X digital Isolator interface digital isolator SLLA181A	PDF
digital clock abstract Abstract: adc crosstalk AN1841 APP1841 digital clock notes Text: Maxim > App Notes > A/D and D/A CONVERSION/SAMPLING CIRCUITS Keywords: noise, power supply coupling, capacitive crosstalk, grounding currents, digital crosstalk, FFT, random noise, harmonic distortion, ADC, DAC, clock, jitter, analog to digital converter, converters	Original	com/an1841 AN1841, APP1841, Appnote1841, digital clock abstract adc crosstalk AN1841 APP1841 digital clock notes	PDF
led clock circuit diagram Abstract: 75188 digital led clock circuit diagram x11 frequency multiplier acf451832-333 tms320c6205 x10 frequency multiplier C6000 C6201 TMS320C6000 Text: Application Report SPRA430A - September 2001 TMS320C6000 System Clock Circuit Example David Bell Scott Chen Digital Signal Processing Solutions ABSTRACT This document describes how to provide the Texas Instruments TMS320C6000 DSP with a system clock. All of the clocks internal to the C6000 are generated from a single source	Original	SPRA430A TMS320C6000 C6000 led clock circuit diagram 75188 digital led clock circuit diagram x11 frequency multiplier acf451832-333 tms320c6205 x10 frequency multiplier C6201	PDF
8052 specification Abstract: "USB Streaming Controller" Architecture of TMS320C54X with diagram block diagram of of TMS320C54X Synthesizers PLL for USB TMS320VC5402 TMS320VC5416 TUSB3200 TLC320AD77C interface mcbsp and codec Text: Application Report SLEA002 – June 2001 TLC320AD77C Clock and Timing Issues Jim Coates Digital Audio Solutions / Digital Audio Video ABSTRACT The Texas Instruments TLC320AD77C stereo audio codec requires a 3-ns separation in edges between MCLK and SCLK and an LRCLK phase stability of ±10 MCLKs over the	Original	SLEA002 TLC320AD77C TMS320C54xTM TUSB3200 8052 specification "USB Streaming Controller" Architecture of TMS320C54X with diagram block diagram of of TMS320C54X Synthesizers PLL for USB TMS320VC5402 TMS320VC5416 interface mcbsp and codec	PDF
AN-5048 Abstract: FIN1018 FIN107 SIGNAL PATH DESIGNER AN5048 Text: Fairchild Semiconductor Application Note August 2002 Revised August 2002 System Clock Distribution Example Using LVDS Abstract Noise within high-speed digital systems especially when dealing with critical signals such as the ones the in clock distribution circuits can be a concern for designers. Running single-ended clocks lines over long traces across a	Original		PDF
schematic diagram lcd tv tuner box Abstract: receiver 8psk schematic diagram circuit diagram of philips USB satellite receiver schematic multiplexer satellite modem Japan b-cas card schematic diagram of cable TV decoder dtv schematic diagram CY24488 picture of processing section of a DTV receiver cypress Date Code Formats Text: Timing Requirements and Solutions In Digital TV Systems ANC0003 Author: Chris Martin and Ted Takehara Associated Project: No Associated Part Family: Programmable Clocks Software Version: None Associated Application Notes: None Application Note Abstract ANC0003 provides an overview of a standard digital television DTV system with regards to typical clock requirements. The	Original	ANC0003 ANC0003 schematic diagram lcd tv tuner box receiver 8psk schematic diagram circuit diagram of philips USB satellite receiver schematic multiplexer satellite modem Japan b-cas card schematic diagram of cable TV decoder dtv schematic diagram CY24488 picture of processing section of a DTV receiver cypress Date Code Formats	PDF
SN74AV1T45 Abstract: DM6446 CDCE925 CDCEL913 PI6CX100-27W PLL1705 SN74AUC1G125 TLV320AIC33 Text: Application Report SCAA084A – June 2007 – Revised August 2007 Clocking Recommendations for DM6446 Digital Video EVM With Single PLL Firoj Kabir. High Speed - Clock Drivers	Original	SCAA084A DM6446 DM6446 PI6CX100-27W, PLL1705, SN74AV1T45 CDCE925 CDCEL913 PI6CX100-27W PLL1705 SN74AUC1G125 TLV320AIC33	PDF
conclusion digital thermometer Abstract: half flash adc Inside Circuit Linear Thermometer ic MAX104 MAX105 MAX106 MAX108 MAX109 MAX1106 MAX1132 Text: Maxim > App Notes > A/D and D/A conversion/sampling circuits Keywords: flash ADCs, analog to digital converters, convertors, analog digital, a to d, A/D, sigma-delta, SAR, successive approximation register, flash ADC, pipelined ADC, subranging ADC, sparkle code, metastability, clock jitter	Original	MAX153 MAX196 12-Bit com/an810 AN810, APP810, Appnote810, conclusion digital thermometer half flash adc Inside Circuit Linear Thermometer ic MAX104 MAX105 MAX106 MAX108 MAX109 MAX1106 MAX1132	PDF
F16 100 HIP Abstract: 384-Pin Text: TMS320C6203B FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS086M − JANUARY 1999 − REVISED MARCH 2004 D High-Performance Fixed-Point Digital D D D D D D Signal Processor DSP − TMS320C62x − 4-, 3.33-ns Instruction Cycle Time − 250-, 300-MHz Clock Rate	Original	TMS320C6203B SPRS086M TMS320C62x 33-ns 300-MHz 32-Bit C6203B C6202 C6204 F16 100 HIP 384-Pin	PDF

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DIGITAL CLOCK ABSTRACT Search Results

DIGITAL CLOCK ABSTRACT Result Highlights (5)

DIGITAL CLOCK ABSTRACT Datasheets Context Search

maxim adc 16 bit 8 channel

maxim 1987

APP2744

str 3234

ARM TZ API

dac 344C

SCR TAG 665 100

Untitled

vdce

01D0

Untitled

TMS320C64X dsp schematic

digital clock abstract

AN4402

CDCV850

electric blanket

digital clock abstract

led clock circuit diagram

8052 specification

AN-5048

schematic diagram lcd tv tuner box

SN74AV1T45

conclusion digital thermometer

F16 100 HIP