Untitled
Abstract: No abstract text available
Text: Embedded DRAM Cu-11 Embedded DRAM Functional Summary • Two configurations: x 256 or x 292 • 1 Mb to 16 Mb in 1 Mb increments - Multiple macros per chip for greater capacity or functional flexibility - Additional width for parity • Data I/O organization:
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Cu-11
256-bit
292-bit
16-bit
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BW002
Abstract: IBM "embedded dram" DRAM0512X8X256 554 CA3 embedded dram ibm 0.18 um CMOS parameters SA-27E DO255 BW255 DO000-DO291
Text: Embedded DRAM SA-27E Embedded DRAM Functional Summary • Two configurations: x 256 or x 292 • 1 Mb to 16 Mb in 1 Mb increments - Multiple macros per chip for greater capacity or functional flexibility - Additional width for parity • Data I/O organization:
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SA-27E
256-bit
292-bit
16-bit
BW002
IBM "embedded dram"
DRAM0512X8X256
554 CA3
embedded dram ibm
0.18 um CMOS parameters
SA-27E
DO255
BW255
DO000-DO291
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4833
Abstract: IBM "embedded dram" SI10 cu-11 A03-A11 bsn15
Text: Embedded DRAM Cu-11 Embedded DRAM Functional Summary • Two configurations: x 256 or x 292 • 1 Mb to 16 Mb in 1 Mb increments - Multiple macros per chip for greater capacity or functional flexibility - Additional width for parity • Data I/O organization:
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Original
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PDF
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Cu-11
256-bit
292-bit
16-bit
4833
IBM "embedded dram"
SI10
cu-11
A03-A11
bsn15
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icl 2822
Abstract: 1004CL 0398C BW002 CCGA 472 device dimensional details diode marking B4Z 0844C 4046 PLL Designers Guide AOI2222 2-bit comparator
Text: Preliminary ASIC Cu-11 Databook Notices: Before using this information and the product it supports, be sure to read the general information on the back cover of this book. Trademarks: The following are trademarks or registered trademarks of International Business Machines
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Cu-11
SA14-2449-00
icl 2822
1004CL
0398C
BW002
CCGA 472 device dimensional details
diode marking B4Z
0844C
4046 PLL Designers Guide
AOI2222
2-bit comparator
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di292
Abstract: CMOS spice model ci470 CI573 pj 26 diode i2931 di640 ci547 RI57 W1-300
Text: Spice Models for HOTLink spect to ground. Pin VGND should be connected to InputBuff Operation Guide system ground. Overview Pin A is the modeled input pin. The TTLinput buffĆ This memo responds to customer requests for a er is valid for all of the TTL inputs on the
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CY7B923/933.
CY7B933.
di292
CMOS spice model
ci470
CI573
pj 26 diode
i2931
di640
ci547
RI57
W1-300
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di292
Abstract: pj 26 diode MJ-05 ci3022 ci470 SCM30 ci573 CMOS spice model di2910 RI57
Text: Spice Models InputBuff Operation Guide How to Use InputBuff Overview Pin VPWR should be connected to the system positive supply and be between 4.5 and 5.5 volts with respect to ground. Pin VGND should be connected to system ground. This memo responds to customer requests for a SPICE model for the HOTLink TTL and ECL input buffers. The requested uses of the output model include:
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pj 59
Abstract: PJ216 pj 26 diode PJ 75 PJ 67 PJ 74 PJ-25 ci3015 pj 84 pj 50 diode
Text: fax id: 5113 Spice Models InputBuff Operation Guide How to Use InputBuff Overview Pin VPWR should be connected to the system positive supply and be between 4.5 and 5.5 volts with respect to ground. Pin VGND should be connected to system ground. This memo responds to customer requests for a SPICE model for the HOTLink TTL and ECL input buffers. The requested uses of the output model include:
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