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    DECIMATION Search Results

    DECIMATION Result Highlights (3)

    Part ECAD Model Manufacturer Description Download Buy
    CD4028BKMSR Renesas Electronics Corporation CMOS BCD-To-Decimal Decoder Visit Renesas Electronics Corporation
    HSP43220JC-25Z Renesas Electronics Corporation Decimating Digital Filter Visit Renesas Electronics Corporation
    HSP43220JC-25 Renesas Electronics Corporation Decimating Digital Filter Visit Renesas Electronics Corporation

    DECIMATION Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    TDA7333

    Abstract: EN50067 4th-order active bandpass filter
    Text: TDA7333 RDS/RBDS PROCESSOR 1 • Features ■ Figure 1. Package 3rd ORDER HIGH RESOLUTION SIGMA DELTA CONVERTER FOR MPX SAMPLING DIGITAL DECIMATION AND FILTERING STAGES DEMODULATION OF EUROPEAN RADIO DATA SYSTEM RDS DEMODULATION OF USA RADIO BROADCAST DATA SYSTEM (RBDS)


    Original     		PDF TDA7333 TSSOP16 TDA7333 EN50067 4th-order active bandpass filter

    vga Picture-in-Picture Processor

    Abstract: RGB switch
    Text: Product Brief SDA 9488X Single-Chip Multi Standard Picture in Picture IC The SDA 9488X integrates analog clamping, ADC, DAC, RGB switch and digital signal processing (color decoding, decimation, storing, output signal processing, data slicing etc.) on a single silicon.


    Original     		PDF 9488X 9488X B111-H7499-X-X-7600 vga Picture-in-Picture Processor RGB switch

    Peter Craven

    Abstract: 114th sacd story
    Text: A New Perspective on Decimation and Interpolation Filters Steve Green Technical Marketing Manager Mixed-Signal Products Cirrus Logic, Inc. 1. Introduction and Historical Perspective Early digital audio conversion systems required very high-order analog filters to provide anti-alias filtering


    Original     		PDF

    CS5181

    Abstract: CS5181-BL
    Text: CS5181 ∆Σ Modulator & 400 kHz to 625 kHz 16-Bit ADC Features Description l 16-Bit CS5181 is a fully calibrated high-speed ∆Σ analog-todigital converter, capable of 625 kSamples/second output word rate OWR . The OWR scales with the master clock. It consists of a 5th order ∆Σ modulator, decimation


    Original     		PDF CS5181 16-Bit 16-Bit CS5181 CS5181s DS250PP1 MS-018 CS5181-BL

    16 point DIF FFT using radix 4 fft

    Abstract: fft algorithm cosin 64 point FFT radix-4 BUTTERFLY DSP spra152 16 point DIF FFT using radix 2 fft TMS320C80 radix-4 ALU flow chart
    Text: Implementing the Radix-4 Decimation in Frequency DIF Fast Fourier Transform (FFT) Algorithm Using a TMS320C80 DSP APPLICATION REPORT: SPRA152 Author: Charles Wu SC Sales & Marketing – TI Taiwan Digital Signal Processing Solutions January 1998 IMPORTANT NOTICE


    Original     		PDF TMS320C80 SPRA152 16 point DIF FFT using radix 4 fft fft algorithm cosin 64 point FFT radix-4 BUTTERFLY DSP spra152 16 point DIF FFT using radix 2 fft radix-4 ALU flow chart

    radix-2 dit fft flow chart

    Abstract: 16 point DIF FFT using radix 4 fft 16 point DIF FFT using radix 2 fft 8 point fft radix-2 DIT FFT C code radix-2 Butterfly two butterflies ADSP-2100
    Text: 6 One-Dimensional FFTs 6.2.3 Radix-2 Decimation-In-Frequency FFT Algorithm In the DIT FFT, each decimation consists of two steps. First, a DFT equation is expressed as the sum of two DFTs, one of even samples and one of odd samples. This equation is then divided into two equations, one


    Original     		PDF 10-bit radix-2 dit fft flow chart 16 point DIF FFT using radix 4 fft 16 point DIF FFT using radix 2 fft 8 point fft radix-2 DIT FFT C code radix-2 Butterfly two butterflies ADSP-2100

    linear convolution

    Abstract: AB-146 ADS1201 ADS1201U OPA177GS XC4010E 10FFT
    Text: USING THE ADS1201 EVALUATION BOARD By Saeid Jannesari FEATURES ● EASY INSTALLATION AND USE ● ON BOARD SINC3 DIGITAL FILTER WITH PROGRAMMABLE MODULATOR CLOCK AND DECIMATION RATIO ● RETRIEVES FILTER OUTPUT DATA INTO PC FOR ANALYSIS AND DISPLAY ● PERFORMS FOURIER TRANSFORMS ON COLLECTED DATA


    Original     		PDF ADS1201 ADS1201U XC4010E linear convolution AB-146 OPA177GS 10FFT

    CXD255Q

    Abstract: CXD2570 CXD2570Q HI2570 HI2570JCQ
    Text: HI2570, CXD2570 O NOT REC September 1997 E D FO R M ME N D SIGNS NEW DE 1-Bit AD/DA Converter For Audio Application Features Description • Two-Channel AD/DA Converters and Their Each Decimation and Oversampling Digital Filter in a Single Chip • Simplified External Parts with a Built-In Analog Circuit


    Original     		PDF HI2570, CXD2570 16kHz) Rippl90 0o-10o CXD255Q CXD2570 CXD2570Q HI2570 HI2570JCQ

    2391

    Abstract: cic filter AD6600 AD6620 AD6640 cic 2133 Block Diagram CIC Filter
    Text: Designing Filters with the AD6620 Greensboro, NC The fourth stage is a sum-of-products FIR filter with programmable 20-bit coefficients, and decimation rates programmable from 1 to 32. The RAM Coefficient FIR Filter can handle a maximum of 256 taps. Abstract: This paper introduces the basics of designing


    Original     		PDF AD6620 20-bit AD6620. AD6620 2391 cic filter AD6600 AD6640 cic 2133 Block Diagram CIC Filter

    9489X

    Abstract: double window digital RGB input analog VGA out
    Text: Product Brief SDA 9489X “PIP IV Advanced“ Single-Chip Multi Standard Picture in Picture IC The SDA 9489X integrates analog clamping, ADC, DAC, RGB switch and digital signal processing (color decoding, decimation, storing, output signal processing, data slicing etc.)


    Original     		PDF 9489X 9489X B111-H7498-X-X-7600 double window digital RGB input analog VGA out

    HSP43168

    Abstract: circuit diagram for FIR filter B910
    Text: HSP43168/883 TM Data Sheet May 1999 FN3177.3 Dual FIR Filter Features The HSP43168/883 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16 and provides on-board storage for 32 sets of coefficients. The Block Diagram shows two FIR


    Original     		PDF HSP43168/883 FN3177 HSP43168/883 MIL-STD-883 HSP43168 circuit diagram for FIR filter B910

    Untitled

    Abstract: No abstract text available
    Text: Stereo PDM-to-I2S or TDM Conversion IC ADAU7002 Data Sheet FEATURES GENERAL DESCRIPTION 64x decimation of a stereo pulse density modulation PDM bit stream to pulse code modulation (PCM) audio data Slave I2S or time division multiplexed (TDM) output interface


    Original     		PDF ADAU7002 ADAU7002 ADAU7002ACBZ-R7 ADAU7002ACBZ-RL EVAL-ADAU7002Z 1-21-2012-A D11265-0-7/13

    LF3320

    Abstract: LF3321
    Text: LF3321 Horizontal Digital Image Filter DEVICES INCORPORATED Improved Performance FEATURES Selectable 16-bit Data Output with UserDefined Rounding and Limiting Supports Interleaved Data Streams Supports Decimation up to 16:1 for Increasing Number of Filter Taps


    Original     		PDF LF3321 16-bit 12-bit 24-bit) 32-Tap 12-bit, CFA11 CFA10 ROUT11 ROUT10 LF3320 LF3321

    LF3311

    Abstract: 743H LF3310 LF3320 RV15 VCF5 VCF9
    Text: LF3311 Horizontal / Vertical Digital Image Filter DEVICES INCORPORATED Improved Performance FEATURES 8 Vertical Filter Taps Two Operating Modes: Dimensionally Separate and Orthogonal Supports Interleaved Data Streams Horizontal Filter Supports Decimation up to


    Original     		PDF LF3311 12-bit 12-bit, DIN11 DIN10 HCF11 HCF10 311-A LF3311 743H LF3310 LF3320 RV15 VCF5 VCF9

    Untitled

    Abstract: No abstract text available
    Text: CS5376A Low-power, Multi-channel Decimation Filter Features Description 1- to 4-channel Digital Decimation Filter The CS5376A is a multi-function digital filter utilizing a low-power signal processing architecture to achieve efficient filtering for up to four ∆Σ modulators. By


    Original     		PDF CS5376A CS5376A CS3301A/02A CS5371A/72A CS4373A DS612F4

    Untitled

    Abstract: No abstract text available
    Text: CS5378 Low-power Single-channel Decimation Filter Features Description  Single-channel Digital Decimation Filter  Multiple On-chip FIR and IIR Coefficient Sets  Programmable Coefficients for Custom Filters  Synchronous Operation  Integrated PLL for Clock Generation


    Original     		PDF CS5378 28-pin

    digital Serial FIR Filter

    Abstract: CS5542 CS5543
    Text: CS5543 Semiconductor Corporation _ 8-Channel Digital Decimation Filter Features General Description • 8-Channel Digital FIR Filter • Self-calibration of Noise, Offset and Gain The CS5543 is a monolithic CMOS, 8-channel digital FIR filter designed to be used with four CS5542 2channel, 22-Bit modulator to form an 8-channel data


    OCR Scan     		PDF CS5543 120dB CS5543 CS5542 22-Bit 44-pin DS181PP3 digital Serial FIR Filter CS5542

    radix-4 DIT FFT C code

    Abstract: radix-2 dit fft flow chart w2k transistor AM29520 64 point dit radix-4 radix-2 DIT FFT C code radix-2 BDR02240 64 point FFT radix-4 r2k v
    Text: Am29540 Am29540 Programmable FFT Address Sequencer DISTINCTIVE CHARACTERISTICS • • • • Decimation in frequency DIF o r decim ation in time (DIT) FFT algorithm s supported 40-pin DIP package, 5 vo lt single supply Generates data and coefficient addresses


    OCR Scan     		PDF Am29540 40-pin DFR00600 DFR00610 03567C radix-4 DIT FFT C code radix-2 dit fft flow chart w2k transistor AM29520 64 point dit radix-4 radix-2 DIT FFT C code radix-2 BDR02240 64 point FFT radix-4 r2k v

    Untitled

    Abstract: No abstract text available
    Text: For Immediate Assistance, Contact Your Local Salesperson B U E R R - B R O W N DF1750 ] Dual Channel DIGITAL DECIMATION FILTER FEATURES DESCRIPTION • USER SELECTABLE FOR 1/4 OR 1/2 DECIMATING RATIOS • PASSBAND RIPPLE < 0.0005dB The DF1750 is a high performance 1/4 or 1/2 decim at­


    OCR Scan     		PDF DF1750 0005dB DF1750 220pF 150kQ OPA26Q4 OPA26Q4s PCM1750.

    Untitled

    Abstract: No abstract text available
    Text: HSP43220 Sem iconductor F e b i u a r y 19 99 Onta S h e e t File N u m b e r 2 4 8 6 .7 Decimating Digital Filter Features The HSP43220 Decimating Digital Filter is a linear phase low pass decimation filter which is optimized for filtering narrow band signals in a broad spectrum of a signal


    OCR Scan     		PDF HSP43220 HSP43220 HSP43220VC-33 HSP43220JC-15 HSP43220JC-25 HSP43220JC-33 HSP43220GC-25 HSP43220GC-33

    Untitled

    Abstract: No abstract text available
    Text: HSP43168/883 Data Sheet May 1999 Dual FIR Filter Features The HSP43168/883 Dual FIR Filter consists of two independent 8-tap FIR filters. Each filter supports decimation from 1 to 16 and provides on-board storage for 32 sets of coefficients. The Block Diagram shows two FIR


    OCR Scan     		PDF HSP43168/883 HSP43168/883 SUM11 SUM10 SUM12 SUM15

    ca 9088

    Abstract: HSP5 TTL SDA9087 9088 pin diagram for IC 4580 ic cd 9088 CD 9088 ic 4580 TDA 1875 Q67100-H5043
    Text: SIEM ENS Picture-in-Picture Processor SDA 9088 Preliminary Data MOS IC Features • Input interface compatible to the data form at of the Digital Multistandard Decoder DMSD SDA 9050/51 if Y, U, V output is used • Decimation of the Y, U, V data for pictures sizes 1/9 and 1/16


    OCR Scan     		PDF Q67100-H8630 P-DIP-28 3x10nF 50kfi 47kfi 100nF ca 9088 HSP5 TTL SDA9087 9088 pin diagram for IC 4580 ic cd 9088 CD 9088 ic 4580 TDA 1875 Q67100-H5043

    HSP5 TTL

    Abstract: sda9050 9088 SDA9088 UVSO 4
    Text: SIEMENS Picture-in-Picture Processor SDA 9088 Preliminary Data MOS IC Features • • • • • • • • Input interface compatible to the data form at of the Digital Multistandard Decoder DMSD SDA 9050/51 if Y, U, V output is used Decimation of the Y, U, V data for pictures sizes 1/9 and 1/16


    OCR Scan     		PDF Q67100-H8630 HSP5 TTL sda9050 9088 SDA9088 UVSO 4

    Untitled

    Abstract: No abstract text available
    Text: FEB ÌT ! 8 noi H A R R H SP43220 I S Decimating Digital Filter February 1991 D escription Features The HSP43220 Decimating Digital Filter is a linear phase low pass decimation filter which is optimized for filtering narrow band signals in a broad spectrum of a signal


    OCR Scan     		PDF SP43220 HSP43220 33MHz