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    D28 PACKAGE DIAGRAM Search Results

    D28 PACKAGE DIAGRAM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH9R00CQ5 Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 150 V, 64 A, 0.009 Ω@10 V, High-speed diode, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH1R306PL Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 100 A, 0.00134 Ω@10 V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPHR8504PL Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 40 V, 150 A, 0.00085 Ω@10 V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation

    D28 PACKAGE DIAGRAM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    21d10

    Abstract: D347 A1667 WE245 D1825 d2132 686 A14 a1162
    Text: Issue 5.1 May 2001 Description Block Diagram Available in PGA PUMA 2 and Gullwing (PUMA77) footprints. The PUMA *FV16006 is a 3.3V 16MBit FLASH module user configurable as 512K x 32, 1M x 16 or 2M x 8. The device is available with access times of 70, 90 and 120ns.


    Original     		PUMA77) FV16006 16MBit 120ns. MIL-STD-883. 77FV16006 2FV16006AMB 21d10 D347 A1667 WE245 D1825 d2132 686 A14 a1162 PDF

    1010 817 D21 B

    Abstract: M68MEVB1632 A-18 D-20 ICD16 SPWM 555 DSA0039272 D44 connector 922 motorola stepper drive D28
    Text: INDEX –A– data word 4-26 I/O block diagram 4-25 interface 4-24 peripheral interface protocol SPI 4-25 sources 4-20 debugging mode freeze assertion diagram A-18 serial communication diagram A-18 timing A-18 Base ID mask bits D-90 Basic operand size 5-24


    Original     		MC68336/376 Index-17 Index-18 1010 817 D21 B M68MEVB1632 A-18 D-20 ICD16 SPWM 555 DSA0039272 D44 connector 922 motorola stepper drive D28 PDF

    D73 -Y

    Abstract: M68MEVB1632 IC 555 timer motor control 1010 817 D21 B transmitter module spwm tx - 4 A-18 D-20 555 stepper pulse generator d11 1117 d92 02
    Text: Freescale Semiconductor, Inc. INDEX Freescale Semiconductor, Inc. –A– data word 4-26 I/O block diagram 4-25 interface 4-24 peripheral interface protocol SPI 4-25 sources 4-20 debugging mode freeze assertion diagram A-18 serial communication diagram A-18


    Original     		MC68336/376 Index-17 Index-18 D73 -Y M68MEVB1632 IC 555 timer motor control 1010 817 D21 B transmitter module spwm tx - 4 A-18 D-20 555 stepper pulse generator d11 1117 d92 02 PDF

    9921

    Abstract: ESM 310 AD9048 TDC1048 ad847 AD9048-SPECIFICATIONS
    Text: a FEATURES 35 MSPS Encode Rate 16 pF Input Capacitance 550 mW Power Dissipation Industry-Standard Pinouts MIL-STD-883 Compliant Versions Available Monolithic 8-Bit Video A/D Converter AD9048 FUNCTIONAL BLOCK DIAGRAM NLINV 12 AD9048 NMINV 28 VIN 23 1 RT 18


    Original     		MIL-STD-883 AD9048 AD9048 09/01--Data 05/01--Data 28-Lead 9921 ESM 310 TDC1048 ad847 AD9048-SPECIFICATIONS PDF

    BCD 548 BC 558

    Abstract: CSBARBT M68MEVB1632 MC68010 D-18 D-19 D-42 MC68332 DSA0039268 BERG CONNECTOR male
    Text: INDEX –A– BGND instruction 4-21 BH D-42 Binary -coded decimal BCD 4-4 BITS D-33 encoding field 6-20 Bits per transfer enable (BITSE) D-38 field (BITS) D-33 BITSE 6-22, D-38 Bit-time 6-27 BKPT 4-20, 5-39, 5-49, 5-58 external signal 4-21 BKPT (TPU asserted) D-42


    Original     		MC68332 Index-11 Index-12 BCD 548 BC 558 CSBARBT M68MEVB1632 MC68010 D-18 D-19 D-42 MC68332 DSA0039268 BERG CONNECTOR male PDF

    MIL-STD-1835

    Abstract: D22 PACKAGE DIAGRAM 40 PIN CERDIP D2 Package diagram D2 Package MIL-STD d 1835 D5011 cerdip cerdip 16 lead
    Text: Package Diagram Ceramic Dual-In-Line Packages 16-Lead 300-Mil CerDIP D2 MIL-STD-1835 D-2 Config. A 18-Lead (300-Mil) CerDIP D4 MIL-STD-1835 D-6 Config. A 1 Package Diagram 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A 22–Lead (400–Mil) CerDIP D8


    Original     		16-Lead 300-Mil) MIL-STD-1835 18-Lead 20-Lead D22 PACKAGE DIAGRAM 40 PIN CERDIP D2 Package diagram D2 Package MIL-STD d 1835 D5011 cerdip cerdip 16 lead PDF

    AD9002

    Abstract: AD9002BJ C1043 AD9002AD
    Text: a FEATURES 150 MSPS Encode Rate Low Input Capacitance: 17 pF Low Power: 750 mW –5.2 V Single Supply MIL-STD-883 Compliant Versions Available High Speed 8-Bit Monolithic A/D Converter AD9002 FUNCTIONAL BLOCK DIAGRAM APPLICATIONS Radar Systems Digital Oscilloscopes/ATE Equipment


    Original     		MIL-STD-883 AD9002 AD9002 AD9002BJ C1043 AD9002AD PDF

    MIL-STD-1835

    Abstract: sidebraze
    Text: Package Diagrams Ceramic Dual-In-Line Packages 16-Lead 300-Mil CerDIP D2 MIL-STD-1835 D-2 Config. A 51-80027 18-Lead (300-Mil) CerDIP D4 MIL-STD-1835 D-6 Config. A 51-80028 1 Package Diagrams 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A 51-80029


    Original     		16-Lead 300-Mil) MIL-STD-1835 18-Lead 20-Lead 22-Lead sidebraze PDF

    80041

    Abstract: MIL-STD-1835 40 PIN CERDIP cerdip D16 PACKAGE DIAGRAM 80046 CERDIP 52 D2 Package diagram D22 PACKAGE DIAGRAM D50 transistor
    Text: Package Diagram Ceramic Dual-In-Line Packages 16-Lead 300-Mil CerDIP D2 MIL-STD-1835 D-2 Config. A 51-80027 18-Lead (300-Mil) CerDIP D4 MIL-STD-1835 D-6 Config. A 51-80028 1 Package Diagram 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A 51-80029


    Original     		16-Lead 300-Mil) MIL-STD-1835 18-Lead 20-Lead 22-Lead 80041 40 PIN CERDIP cerdip D16 PACKAGE DIAGRAM 80046 CERDIP 52 D2 Package diagram D22 PACKAGE DIAGRAM D50 transistor PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868A www.ti.com. SCAS846C – JULY 2007 – REVISED MARCH 2009 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST


    Original     		74SSTUB32868A SCAS846C 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868A www.ti.com. SCAS846C – JULY 2007 – REVISED MARCH 2009 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST


    Original     		74SSTUB32868A SCAS846C 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868 www.ti.com . SCAS835C – JUNE 2007 – REVISED MARCH 2009 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST


    Original     		74SSTUB32868 SCAS835C 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868 www.ti.com . SCAS835C – JUNE 2007 – REVISED MARCH 2009 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST


    Original     		74SSTUB32868 SCAS835C 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868 www.ti.com . SCAS835C – JUNE 2007 – REVISED MARCH 2009 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST


    Original     		74SSTUB32868 SCAS835C 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868A www.ti.com SCAS846B – JULY 2007 – REVISED NOVEMBER 2007 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATURES 1 • Member of the Texas Instruments Widebus+ Family • Pinout Optimizes DDR2 DIMM PCB Layout • 1-to-2 Outputs Support Stacked DDR2 DIMMs


    Original     		74SSTUB32868A SCAS846B 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: a FEATURES 35 MSPS Encode Rate 16 pF Input Capacitance 550 mW Power Dissipation Industry-Standard Pinouts MIL-STD-883 Compliant Versions Available Monolithic 8-Bit Video A/D Converter AD9048 FUNCTIONAL BLOCK DIAGRAM NLINV 12 AD9048 NMINV 28 VIN 23 1 RT 18


    Original     		MIL-STD-883 AD9048 AD9048 TDC1048 28-Lead PDF

    Ad9048 test circuit

    Abstract: basic plc ladder diagram AD9048 TDC1048 AD9048-SPECIFICATIONS
    Text: a FEATURES 35 MSPS Encode Rate 16 pF Input Capacitance 550 mW Power Dissipation Industry-Standard Pinouts MIL-STD-883 Compliant Versions Available Monolithic 8-Bit Video A/D Converter AD9048 FUNCTIONAL BLOCK DIAGRAM NLINV 12 AD9048 NMINV 28 VIN 23 1 RT 18


    Original     		MIL-STD-883 AD9048 AD9048 09/01--Data 05/01--Data 28-Lead Ad9048 test circuit basic plc ladder diagram TDC1048 AD9048-SPECIFICATIONS PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868A www.ti.com. SCAS846C – JULY 2007 – REVISED MARCH 2009 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST


    Original     		74SSTUB32868A SCAS846C 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: 74SSTUB32868A www.ti.com SCAS846B – JULY 2007 – REVISED NOVEMBER 2007 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATURES 1 • Member of the Texas Instruments Widebus+ Family • Pinout Optimizes DDR2 DIMM PCB Layout • 1-to-2 Outputs Support Stacked DDR2 DIMMs


    Original     		74SSTUB32868A SCAS846B 28-BIT 56-BIT PDF

    Untitled

    Abstract: No abstract text available
    Text: ANALOG DEVICES Complete 12-Bit A/D Converter FUNCTIONAL BLOCK DIAGRAM FEATURES Complete 12-Bit A/D Converter with Reference and Clock Faster Version of AD574A 8- and 16-Bit Bus Interface No Missing Codes Over Temperature 15 ixs max Conversion Time ±12 V and ±15 V Operation


    OCR Scan     		12-Bit AD574A 16-Bit AD674B AD674A AD674AJD AD674AKD PDF

    Untitled

    Abstract: No abstract text available
    Text: ANALOG D EV IC ES □ Complete 12-Bit A/D Converter AD674A* FUNCTIONAL BLOCK DIAGRAM FEATURES Complete 12-Bit A/D Converter with Reference and Clock Faster Version of AD574A 8- and 16-Bit Bus Interface No Missing Codes Over Temperature 15 ps max Conversion Time


    OCR Scan     		12-Bit AD674A* AD574A 16-Bit AD674B AD674A AD674AJD PDF

    AD674A

    Abstract: AD674AKD AD574A AD674B AD674AJD
    Text: ANALOG Complete DEVICES_ 12-Bit A/D Converter AD674A* □ FU N C T IO N A L BLOCK DIAGRAM FEATURES Complete 12-Bit A /D Converter w ith Reference and Clock Faster Version of AD574A 8- and 16-Bit Bus Interface No Missing Codes Over Temperature


    OCR Scan     		12-Bit AD674A* AD574A 16-Bit AD674B AD674A AD674AJD AD674AKD AD674B PDF

    7450 ttl

    Abstract: 74LS series logic gates 3 input or gate 74LS126 74LS125 74LS51 74LS series logic gates 7454 74H55 7453 logic diagram ic 74125
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D27 9005, 54/7450, 54H/74H50 D26 54H/74H52 D25 9S42 Vcc R FI FI R R R R R r r r r r r r ^ LÜliJ LULlIET'til LilGND r r - lU lil lil liJ'lil L iitn GND D30 54/7454, 54H/74H54 D29 9008, 54/7453, 54H/74H53 D28


    OCR Scan     		54H/74H52 54H/74H50 54H/74H51* 54S/74S51* 54LS/74LS51 54H/74H53 54H/74H54 54LS/75LS54 74S64, 7450 ttl 74LS series logic gates 3 input or gate 74LS126 74LS125 74LS51 74LS series logic gates 7454 74H55 7453 logic diagram ic 74125 PDF

    AD872

    Abstract: KI-446-6212
    Text: Complete 12-Bit 10 MSPS Monolithic A/D Converter AD872A ANALOG DEVICES □ FUNCTIONAL BLOCK DIAGRAM FEA TU R ES M o n o lith ic 1 2-B it 10 M S P S A /D C o n v e rte r AV00 AGNO AVSS DV dd DGND *DRV00 *DRGND L o w N oise: 0 .2 6 LSB R M S R e fe rre d -to -ln p u t


    OCR Scan     		12-Bit AD872A DRV00 AD872 KI-446-6212 PDF