a 6351
Abstract: paradyne 8610 SHDSL configuration Paradyne 8820 SHDSL modems up/LG 6351
Text: Hotwire 8312/8314 ReachDSL Subscriber Line Cards 6310/6350/6351 ReachDSL Modems/Router F E AT U R E S • Provides consistent delivery of broadband services regardless of copper condition: — Long loops — Poor quality loops — Bad premises wiring
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DSL-6383-7-1101
a 6351
paradyne 8610
SHDSL configuration
Paradyne 8820
SHDSL modems
up/LG 6351
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NK 637
Abstract: b 537 ADSP-21160 EM10 GP10 AT-637 AOS PACKING
Text: &21752/67$7865(*,67(56 Figure E-0. Table E-0. Listing E-0. 2YHUYLHZ This appendix provides bit definitions for the ADPS-21160s control and status registers. Some of the registers are located in the processor core; these are called system registers, a subset of the processors universal register set. The core processor system registers are MODE1, MODE2,
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ADPS-21160s
ADSP-21160s
ADSP-21160
Reset80000000
NK 637
b 537
EM10
GP10
AT-637
AOS PACKING
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Zippy
Abstract: atx12v Zippy Technology AT8LK LAN Toner Kit 6350p R2G-6350P power supply 350W 350w 350w atx atx 350w
Text: Emacs/Zippy R2G-6350P 350W ATX12V Redundant Power Supply for 2U Chassis . Page 1 of 2 Sunday, July 09 2006 9:04:53 AM 0 Items In Cart Total: $0.00 Call toll free: 1-888-3464688 Monday-Friday 9am-6pm Eastern Raleigh Area : 919-5105464 Enter Keywords Here [Alt+S]
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R2G-6350P
ATX12V
100mV
150mV
Zippy
Zippy Technology
AT8LK LAN Toner Kit
6350p
power supply 350W
350w
350w atx
atx 350w
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RXB38
Abstract: BMS 13-48 bus arbitration protocol super harvard architecture block diagram ADSP-21000 A-18 ADSP-21060 ADSP-21061 ADSP-21062 ADSP-2106X
Text: Contents CHAPTER 1 INTRODUCTION 1.1 OVERVIEW .1-1 1.2 ADSP-21000 FAMILY FEATURES & BENEFITS .1-5 1.2.1 System-Level Enhancements .1-6
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ADSP-21000
ADSP-2106X
RXB38
BMS 13-48
bus arbitration protocol
super harvard architecture block diagram
A-18
ADSP-21060
ADSP-21061
ADSP-21062
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l1206
Abstract: l1303 L1119 HC12 L1001 L1003 L1004 L1005 L1007 L1110
Text: MCUEZLINK/D August 1997 MCUez LINKER USER’S MANUAL Copyright 1997 HIWARE AG; All Rights Reserved Important Notice to Users While every effort has been made to ensure the accuracy of all information in this document, Motorola assumes no liability to any party for any loss or damage caused by errors or omissions or
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motorola Transistor BC 457
Abstract: L1114 l1303 L1103 L1106 HC05 HC08 HC12 L1110 M6805
Text: MCUEZLNK0508/D February 1998 MCUez LINKER USER'S MANUAL Copyright 1998 MOTOROLA and HIWARE AG; All Rights Reserved Important Notice to Users While every effort has been made to ensure the accuracy of all information in this document, Motorola assumes no liability to any party for any loss or damage caused by errors or omissions
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MCUEZLNK0508/D
Win32s
motorola Transistor BC 457
L1114
l1303
L1103
L1106
HC05
HC08
HC12
L1110
M6805
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L1100
Abstract: L1106 L1103 l1303 HC12 L1110 M6805 HC05 HC08 L1115
Text: Freescale Semiconductor, Inc. MCUEZLNK0508/D Freescale Semiconductor, Inc. February 1998 MCUez LINKER USER'S MANUAL Copyright 1998 MOTOROLA and HIWARE AG; All Rights Reserved For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc.
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MCUEZLNK0508/D
Win32s
L1100
L1106
L1103
l1303
HC12
L1110
M6805
HC05
HC08
L1115
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VFL700
Abstract: VFL 683 visible light communication
Text: fiber.book : sec10.2.fm Page 10 Thursday, June 22, 2000 11:40 AM VFL700 Visible Fault Locator The Visible Fault Locator VFL is a 635nm laser source designed to be used to locate connections, bends, splices and cuts which increase the loss in the fiber path. Problem areas in the fiber path
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sec10
VFL700
635nm
750-OTS-SC
750-OTS-ST
750-OTS
730/750-OTS
2492C)
VFL 683
visible light communication
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B1137
Abstract: 2n2 f250 branch metric viterbi algorithm Convolutional Encoder TMS320C6416 Transistor y2n TMS320C6000 TR45
Text: Application Report SPRA750D - September 2003 Using TMS320C6416 Coprocessors: Viterbi Coprocessor VCP Jelena Nikolic-Popovic Digital Signal Processing Solutions ABSTRACT Viterbi Coprocessor (VCP) is a programmable peripheral for decoding of convolutional
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SPRA750D
TMS320C6416
B1137
2n2 f250
branch metric
viterbi algorithm
Convolutional Encoder
Transistor y2n
TMS320C6000
TR45
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chn 542
Abstract: No abstract text available
Text: xr XRT86VL32 PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO FEBRUARY 2005 REV. P1.0.3 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86VL32
XRT86VL32
chn 542
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DMO 565 R
Abstract: SCR PIN CONFIGURATION CHN 035 tp 147
Text: xr XRT86VL34 PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO JUNE 2005 REV. P1.0.4 GENERAL DESCRIPTION The XRT86VL34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86VL34
XRT86VL34
DMO 565 R
SCR PIN CONFIGURATION CHN 035
tp 147
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RxFr1544
Abstract: No abstract text available
Text: xr XRT86VL32 PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO JUNE 2005 REV. P1.0.4 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86VL32
XRT86VL32
RxFr1544
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8 channel RC transmitter and Receiver circuit DIA
Abstract: CY7B923 CY7B933 RG-62 Siemens BIT Cypress VHDL alias 5 pin wire coupling
Text: t Frequently Asked Questions about HOTLink t The following questions are frequently asked by customers who are evaluating HOTLink products. These cursory answers will serve as an introduction for each topic. Separate application notes cover these topics in
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CY7B923
CY7B933
8 channel RC transmitter and Receiver circuit DIA
CY7B923
CY7B933
RG-62
Siemens BIT
Cypress VHDL
alias 5 pin wire coupling
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DMO 565 R
Abstract: chn 656 chn 637 chn 547 CHN 549 dmo 265 CHN 922 equivalent CHN 632 CHN 645 chn 648 equivalent
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.3 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
DMO 565 R
chn 656
chn 637
chn 547
CHN 549
dmo 265
CHN 922 equivalent
CHN 632
CHN 645
chn 648 equivalent
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Untitled
Abstract: No abstract text available
Text: RS 454-6358 Inner height D 31 mm Double share single link joining construction with large anti-friction single-pin. Frames removable from inner radius. Vertical separators are available. Wide frames on outer radius offer good protection. Due to its design
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Untitled
Abstract: No abstract text available
Text: 1.8 x 3.8mm Rectangular Low Profile u e d RJ45 Port Status Indicator LEDs ’ Features Applications Options • Each LED Shielded from • Transmit/Receive, Link Status View at Each Port Adjacent LEDs • Modems • Super Bright LEDs • Status Indicators
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5/12V
PCB-1202-1RG-01
PCB-1202-1YG-01
PCB-1202-3XX
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Untitled
Abstract: No abstract text available
Text: B Ï U TECHNOLOGIES D L ÎC 2 Û 4 0 45E D 01 11Ô50Ô3 Q0QQQH7 M BIBTDT T ra ra s c e a ^ e s r FIBER OPTIC DATA LINK Features: Applications: • Full FDDI compliance • Compatible with 4-row industry standard pin-out • Single piece integrated FDDI transmitter/
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DLX2040
DLX2040
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spectran
Abstract: BD 266 S HFBR-25X4
Text: WBi HEWLETT* mLUM P A C K A R D 10 Megabaud Versatile Link Fiber Optic Transm itter and R eceiver for 1 mm POF and 200 |nm HCS HFBR-0508 Series HFBR-1528 Transm itter HFBR-2528 Receiver Technical Data Features Applications • Data Transmission at Signal
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HFBR-1528
HFBR-2528
spectran
BD 266 S
HFBR-25X4
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BT-8
Abstract: No abstract text available
Text: ^ B T & » TECH NOL OGIES &Z?4i 4SE D 116SQA3 0G0DG42 S BiBTDT '*"< 3 T E C H N O L O G I E S T - m - 91 D L K 2 0 0 0 T r a n s c e iv e r FIBER OPTIC DATA LINK Features: Applications: • Full FDDI compliance • FDDI systems • Single piece integrated FDDI transmitter/
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116SQA3
0G0DG42
DLX2000
BT-8
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Untitled
Abstract: No abstract text available
Text: CM OS M anchester Encoder-D ecoder P in o u ts In the Repeater mode, the MED accepts Manchester code Input and recon structs it with a recovered clock. This minimizes the effects of noise on a serial data link. A digital phase lock loop generates the recovered clock. A
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Mil-Std-883
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LVC16541
Abstract: No abstract text available
Text: 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS, 5 VOLTTOLERANT I/O DESCRIPTION: FEATURES: - Typical tsK o (O utput S kew ) < 2 5 0p s E S D > 2 0 0 0 V per M IL -S T D -8 8 3 , Method 3 0 1 5 ; > 2 0 0 V using m achine model (C = 2 0 0 p F , R = 0) 0 .635m m pitch S S O P , 0.5 0 m m pitch T S S O P
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16-BIT
IDT74LVC16541A
IDT74LVC16541A
LVC16541
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NCR92C02A
Abstract: 35TH NCR asic mau aui NE521 P802 NCR SCSI cxb 100 transformer
Text: i ? ima M l C l P NCR92C02A Ethernet Twisted Pair Transceiver FEATURES Digital Im plem entation of IE E E 802.3 10B A SE-T Media A ttachm ent U nit M A U . Synchronous design for embedded M AU applications. Digital Equalization C ontrol for use with external summing resistors.
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NCR92C02A
10BASE-T
T01901N
NCR92C02A
35TH
NCR asic
mau aui
NE521
P802
NCR SCSI
cxb 100 transformer
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R2528
Abstract: No abstract text available
Text: ¥hp% H EW LETT 1 M M PA CKARD 10 Megabaud Versatile Link Fiber Optic Transmitter and Receiver for 1 mm POF and 200 |im HCS HFBR-0508 Series HFBR-1528 Transmitter HFBR-2528 Receiver Technical Data Features Applications • Data Transmission at Signal Kates o f dc to 10 MBd
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R-1528
R-2528
R2528
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HPR25
Abstract: AM79C901 circuit diagram of new holland fx 58
Text: P R E L IM IN A R Y AMD£I Am79C901 HomePHY1" Single-Chip 1/10 Mbps Home Networking PHY DISTINCTIVE CHARACTERISTICS • Fully integrated 1 Mbps HomePNA Physical Layer PHY as defined by Home Phoneline Networking Alliance (HomePNA) specification 1.1 — Optimized for home networking applications
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Am79C901
widt86-446188
PI-750-9/99-0
HPR25
circuit diagram of new holland fx 58
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