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    CY7C1474V33 Price and Stock

    Rochester Electronics LLC CY7C1474V33-200BGC

    IC SRAM 72MBIT PARALLEL 209FBGA
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    Rochester Electronics LLC CY7C1474V33-167BGC

    IC SRAM 72MBIT PAR 209FBGA
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    Flip Electronics CY7C1474V33-167BGC

    IC SRAM 72MBIT PAR 209FBGA
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    Infineon Technologies AG CY7C1474V33-200BGC

    IC SRAM 72MBIT PARALLEL 209FBGA
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    Infineon Technologies AG CY7C1474V33-167BGC

    IC SRAM 72MBIT PAR 209FBGA
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    DigiKey CY7C1474V33-167BGC Tray 84
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    CY7C1474V33-167BGC 0 Weeks, 2 Days 5
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    Rochester Electronics CY7C1474V33-167BGC 51 1
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    CY7C1474V33 Datasheets (12)

    Part ECAD Model Manufacturer Description Curated Type PDF
    CY7C1474V33 Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-167BGC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-167BGC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-167BGCES Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-167BGI Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-167BGXC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-167BGXI Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-200BGC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-200BGC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V Original PDF
    CY7C1474V33-200BGXC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-250BGC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF
    CY7C1474V33-250BGXC Cypress Semiconductor 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture Original PDF

    CY7C1474V33 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY7C1470V33

    Abstract: CY7C1472V33 CY7C1474V33 H-1143
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 36/4M 18/1M 250-MHz CY7C1470V33, CY7C1472V33 CY7C1470V33 CY7C1474V33 H-1143

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Functional Description Features The CY7C1470V33, CY7C1472V33, and CY7C1474V33 are


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    cy7c1470v33

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 ADVANCE INFORMATION 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency™, no dead cycles between Write and Read cycles • Fast clock speed: 300, 250, 200, and 167 MHz • Fast access time: 2.2, 2.4, 3.0 and 3.4 ns


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 36/4M 18/1M CY7C1470V33/CY7C1472V33/CY7C1474V33

    CY7C1470V33

    Abstract: CY7C1472V33 CY7C1474V33
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72 Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT ■ Supports 250 MHz Bus Operations with Zero Wait States ❐ Available speed grades are 250, 200 and 167 MHz


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 36/4M 18/1M CY7C1470V33its CY7C1470V33 CY7C1472V33 CY7C1474V33

    CY7C1470V33

    Abstract: CY7C1472V33 CY7C1474V33 FBGA71
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72 Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT ■ Supports 250 MHz Bus Operations with Zero Wait States ❐ Available speed grades are 250, 200 and 167 MHz


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 36/4M 18/1M CY7C1470V33, CY7C1472V33, CY7C1474V33 CY7C1470V33 CY7C1472V33 FBGA71

    cy7c1470v33

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    CY7C1470V33-167AXI

    Abstract: CY7C1470V33 CY7C1472V33 CY7C1474V33
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 36/4M 18/1M 250-MHz CY7C1470V33, CY7C1472V33 CY7C1470V33-167AXI CY7C1470V33 CY7C1474V33

    cy7c1470v33

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 36/4M 18/1M 250-MHz 200-MHz 167-MHz

    CY7C1470V33

    Abstract: CY7C1472V33 CY7C1474V33
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33 CY7C1472V33 CY7C1474V33

    112A342

    Abstract: CY7C1472V33 CY7C1472V33-200 CY7C1472V33-250 CY7C1474V33 CY7C1470V33 CY7C1470V33-167 CY7C1470V33-200 CY7C1470V33-250 L1028
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 PRELIMINARY 72-Mbit 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ • Supports 250-MHz bus operations with zero wait states


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 36/4M 18/1M 250-MHz CY7C1470V33, CY7C1472V33, CY7C1474V33 112A342 CY7C1472V33 CY7C1472V33-200 CY7C1472V33-250 CY7C1470V33 CY7C1470V33-167 CY7C1470V33-200 CY7C1470V33-250 L1028

    Untitled

    Abstract: No abstract text available
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description • Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33

    CY7C1470V33

    Abstract: CY7C1472V33 CY7C1474V33
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit 2 M x 36/4 M × 18/1 M × 72 Pipelined SRAM with NoBL Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture Features Functional Description n Pin compatible and functionally equivalent to ZBT


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 72-Mbit CY7C1470V33, CY7C1472V33, CY7C1474V33 CY7C1470V33 CY7C1472V33

    CY7C1470V33

    Abstract: CY7C1472V33 CY7C1474V33
    Text: CY7C1470V33 CY7C1472V33 CY7C1474V33 PRELIMINARY 2M x 36/4M x 18/1M x 72 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency™, no dead cycles between Write and Read cycles • Fast clock speed: 250, 200, and 167 MHz • Fast access time: 2.4, 3.0 and 3.4 ns


    Original     		PDF CY7C1470V33 CY7C1472V33 CY7C1474V33 36/4M 18/1M CY7C1470V33/CY7C1472V33/CY7C1474V33 CY7C1470V33 CY7C1472V33 CY7C1474V33

    CY7C1338-100AXC

    Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
    Text: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12


    Original     		PDF CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC