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    CY7C1298F Search Results

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    CY7C1298F Price and Stock

    Rochester Electronics LLC CY7C1298F-133AC

    STANDARD SRAM, 64KX18, 4NS, CMOS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1298F-133AC Bulk 575 18
    • 1 -
    • 10 -
    • 100 $17.33
    • 1000 $17.33
    • 10000 $17.33
    		Buy Now

    Infineon Technologies AG CY7C1298F-133AC

    STANDARD SRAM, 64KX18, 4NS, CMOS, PQFP100 - Bulk (Alt: CY7C1298F-133AC)
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Avnet Americas CY7C1298F-133AC Bulk 4 Weeks 21
    • 1 $17.5
    • 10 $17.5
    • 100 $15.66
    • 1000 $14.16
    • 10000 $14.16
    		Buy Now

    Cypress Semiconductor CY7C1298F-133AC

    Standard SRAM, 64KX18, 4ns, CMOS, PQFP100 '
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics CY7C1298F-133AC 575 1
    • 1 $17.5
    • 10 $17.5
    • 100 $16.45
    • 1000 $14.87
    • 10000 $14.87
    		Buy Now

    CY7C1298F Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Type PDF
    CY7C1298F Cypress Semiconductor 1-Mb (64K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1298F-133AC Cypress Semiconductor 1-Mb (64K x 18) Pipelined DCD Sync SRAM Original PDF

    CY7C1298F Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: CY7C1298F 1-Mb 64K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • Optimal for performance (Double-Cycle deselect) — Depth expansion without wait state • 64K x 18-bit common I/O architecture


    Original     		PDF CY7C1298F 18-bit 166-MHz 133-MHz 100-pin CY7C1298F

    A101

    Abstract: CY7C1298F CY7C1298F-133AC
    Text: CY7C1298F 1-Mbit 64K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • Optimal for performance (Double-Cycle deselect) — Depth expansion without wait state • 64K x 18-bit common I/O architecture


    Original     		PDF CY7C1298F 18-bit 166-MHz 133-MHz 100-pin CY7C1298F A101 CY7C1298F-133AC

    A101

    Abstract: CY7C1298F CY7C1298F-133AC
    Text: CY7C1298F 1-Mbit 64K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Registered inputs and outputs for pipelined operation • Optimal for performance (Double-Cycle deselect) — Depth expansion without wait state • 64K x 18-bit common I/O architecture


    Original     		PDF CY7C1298F 18-bit 166-MHz 133-MHz 100-pin CY7C1298F A101 CY7C1298F-133AC