Untitled
Abstract: No abstract text available
Text: CMX7161 CML Microcircuits Digital Radio Processor COMMUNICATION SEMICONDUCTORS DATASHEET D/7161_FI-1.0/3 September 2013 Advance Information 7161FI-1 TDMA Digital Radio Processor Features Tx Functions: • Two-point modulation analogue outputs Root-raised-cosine =0.2 pulse shaping
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CMX7161
D/7161
7161FI-1
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LT602
Abstract: LTC1569-6 LTC1569C LTC1569CS8-6 LTC1569I LTC1569IS8-6 39VP-P 3844n
Text: LTC1569-6 Linear Phase, DC Accurate, Low Power, 10th Order Lowpass Filter FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ One External R Sets Cutoff Frequency Root Raised Cosine Response 3mA Supply Current with a Single 3V Supply Up to 64kHz Cutoff on a Single 3V Supply
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LTC1569-6
64kHz
LTC1264-7
200kHz
LTC1562/LTC1562-2
150kHz
LTC1562)
300kHz
LTC1562-2)
LTC1563-2/LTC1563-3
LT602
LTC1569-6
LTC1569C
LTC1569CS8-6
LTC1569I
LTC1569IS8-6
39VP-P
3844n
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Quadrature Oscillator
Abstract: No abstract text available
Text: 4423 SBFS020A − JANUARY 1978 − REVISED JUNE 2004 Precision Quadrature Oscillator FEATURES D Sine and Cosine Outputs D Resistor-Programmable Frequency D Wide Frequency Range: 0.002Hz to 20kHz D Low Distortion: 0.2% max up to 5kHz D Easy Adjustments D Small Size
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SBFS020A
002Hz
20kHz
Quadrature Oscillator
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IDCT design FPGA
Abstract: dct verilog code
Text: Ease of Integration & Performance High clock speed >250 MHz in 0.18um ASIC technologies IDCT Low gate count Single clock cycle per sample 2-D Inverse Discrete Cosine Transform Core operation Low latency (86 cycles) Design Quality The IDCT core implements the 2D Inverse Cosine Transform. Most of the image/video
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16x16
IDCT design FPGA
dct verilog code
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dct verilog code
Abstract: EP20K100E-1 EP1S10-C5
Text: Ease of Integration & Performance High clock speed >250 MHz in 0.18um ASIC technologies IDCT Low gate count 2-D Inverse Discrete Cosine Transform Megafucntion Low latency (86 cycles) Single clock cycle per sample operation Design Quality
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16x16
dct verilog code
EP20K100E-1
EP1S10-C5
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dct verilog code
Abstract: EP20K100E-1 2d dct block
Text: Ease of Integration & Performance High clock speed >250 MHz in 0.18um ASIC technologies DCT Low gate count 2-D Forward Discrete Cosine Transform Megafunction Low latency (87 cycles) Single clock cycle per sample operation Design Quality Fully compliant with the JPEG
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16x16
dct verilog code
EP20K100E-1
2d dct block
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MLS1000
Abstract: MLS-1000 AD8605 MLS-5000 AMR sensor AMR sensor temperature
Text: Magnetic Length Sensor MLS • • • • Wafer Small Hybride Large Hybride AMR gradient sensor Linear displacement, movements, velocities High precision Various pole pitches available DESCRIPTION Sliding the MLS-Sensors along a magnetic scale will produce a sine and a cosine output signal as a function
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2010-september
MLS1000
MLS-1000
AD8605
MLS-5000
AMR sensor
AMR sensor temperature
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BPRA047
Abstract: bpra TI AR7 27666 table lookup
Text: Sine, Cosine on the TMS320C2xx Application Report Literature Number: BPRA047 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to
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TMS320C2xx
BPRA047
01e76h
00aceh
05bc0h
1000h
BPRA047
bpra
TI AR7
27666
table lookup
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fsk modulator using 555
Abstract: PLC modem plc modem using fsk X25 crc fsk modem MX 128 D MX919B MX919BDS MX919BDW MX919BLH
Text: MX919B COMMUNICATION SEMICONDUCTORS DATA BULLETIN 4-Level FSK Modem Data Pump PRELIMINARY INFORMATION Features Applications • 4-Level Root Raised Cosine FSK Modulation • Wireless Data Terminals • Half Duplex, 4800 to 19.2kbps • Two Way Paging Systems
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MX919B
fsk modulator using 555
PLC modem
plc modem using fsk
X25 crc
fsk modem
MX 128 D
MX919B
MX919BDS
MX919BDW
MX919BLH
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D3318
Abstract: direct pm modulation circuit PDSP16350 PDSP16488A PDSP16510A COS10
Text: PDSP16350 PDSP16350 I/Q Splitter/NCO Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16
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PDSP16350
HB3923-1
PDSP16350
D3318
direct pm modulation circuit
PDSP16488A
PDSP16510A
COS10
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600 servo
Abstract: No abstract text available
Text: 116-200 BFZ-SFZ Vishay Sfernice Precision Rotative Transducers ROT FEATURES • Laws: sine and cosine/sine only/cosine only • Size 11 - 20 • Continuous Measure on 360° • Long Life up to 40.106 cycles • Conformity from ± 1% down to ± 0.35% • Bushing or Servo Mounting
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MIL-R-39023
20-Dec-01
600 servo
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COS10
Abstract: PDSP16350 PDSP16488A PDSP16510A DIN24 PDSP16256/A
Text: PDSP16350 PDSP16350 I/Q Splitter/NCO DS3711 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16 bit amplitude accuracy, and are synthesised using a 34 bit
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PDSP16350
DS3711
PDSP16350
COS10
PDSP16488A
PDSP16510A
DIN24
PDSP16256/A
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precision Sine Wave Generator
Abstract: XC4000 XC4000E sine cosine function generator pt 116
Text: dsp_trigtabl.fm Page 75 Monday, July 6, 1998 5:52 PM Sine/Cosine July 17, 1998 Product Specification R Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: coregen@xilinx.com URL: www.xilinx.com format. However, values for theta may be provided in either
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Trigonometric
Abstract: Vishay S.A
Text: Data sheet E 4/ 5.657 - 10497 MIL-R 39023 116 200 ROT BF SF Z precision rotative transducer laws : sine and cosine / sine only / cosine only trigonometric functions VISHAY S.A. International Department 199, Boulevard de la Madeleine B.P. 1159 F 06003 NICE CEDEX 1
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RH115
Abstract: "digital to synchro" resolver natel RL115 digital trainer NATEL ILC Data Device Synchro to digital convertor rh26 SIN COS
Text: DR-11800 16-BIT DIGITAL-TO-RESOLVER CONVERTER FEATURES DESCRIPTION The DR-11800 is a small size, high accuracy, 16-bit digital-to-sine/cosine converter. Available in accuracies up to 1 arc minute, the DR-11800 is contained in a 28-pin, one-square-inch hermetically sealed package and
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DR-11800
16-BIT
DR-11800
28-pin,
16-bit
1-800-DDC-5757
RH115
"digital to synchro"
resolver natel
RL115
digital trainer
NATEL
ILC Data Device
Synchro to digital convertor
rh26
SIN COS
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Untitled
Abstract: No abstract text available
Text: LTC1569-6 Linear Phase, DC Accurate, Low Power, 10th Order Lowpass Filter FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ One External R Sets Cutoff Frequency Root Raised Cosine Response 3mA Supply Current with a Single 3V Supply Up to 64kHz Cutoff on a Single 3V Supply
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LTC1569-6
64kHz
LTC1264-7
200kHz
LTC1562/LTC1562-2
150kHz
LTC1562)
300kHz
LTC1562-2)
LTC1563-2/LTC1563-3
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Untitled
Abstract: No abstract text available
Text: a CMOS JDC /4 DQPSK Baseband Transmit Port AD7010 FEATURES Single +5 V Supply On-Chip /4 DQPSK Modulator Root-Raised-Cosine Tx Filters, ␣ = 0.5 Two 10-Bit D/A Converters 4th Order Reconstruction Filters Differential Analog Outputs On-Chip Ramp Up/Down Power Control
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10-Bit
24-Pin
AD7010
AD7010
24-Lead
RS-24)
MIL-M-38510
C1779a
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Untitled
Abstract: No abstract text available
Text: ANALOG DEVICES CMOS TIA IS-54 Baseband Receive Port AD7013 FEATURES Single +5 V Supply Receive Channel Differential or Single-Ended Analog Inputs Auxiliary Set of Analog I & Q Inputs Two Sigma-Delta A /D Converters Choice of Two Digital FIR Filters Root-Raised-Cosine Rx Filters, a = 0.35
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IS-54
AD7013
28-Pin
IS-54)
AD7013
0042b30
28-Lead
RS-28)
0DM2b31
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Untitled
Abstract: No abstract text available
Text: CMOS TIA IS-54 Baseband Receive Port AD7013 ANALOG DEVICES FEATURES Single +5 V Supply Receive Channel Differential or Single-Ended Analog Inputs Auxiliary Set of Analog l&Q Inputs Two Sigma-Delta A /D Converters Choice of Two Digital FIR Filters Root-Raised-Cosine Rx Filters, a = 0.35
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IS-54
AD7013
28-Pin
IS-54)
28-Lead
RS-28)
MIL-M-38510
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Untitled
Abstract: No abstract text available
Text: M JE S S E Y SEMICONDUCTORS _ PDSP16340 POLAR TO CARTESIAN CONVERTER SUPERSEDES APRIL 1990 EDITION The PDSP16340 can be configured to perform either a coordinate conversion function, or simply to provide a sine / cosine look-up table. When employed as an coordinate con
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PDSP16340
PDSP16340
MIL-STD-883C
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Untitled
Abstract: No abstract text available
Text: M T M L i S i ^ S E Final Electrical Specifications u r m TECHNOLOGY LTC1069-7 Linear Phase 8th O rder Lowpass Filter N o v e m b e r 19 96 F€OTUR€S • 8th Order, Linear Phase Filter in S0-8 Package ■ Raised Cosine Amplitude Response ■ -43dB Attenuation at Twice fcuTOFF
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LTC1069-7
-43dB
200kHz
140kHz
LTC1069-7
LTC1064-3
LTC1064-7
100kHz
LTC1164-7
LTC1264-7
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8086 opcode sheet with mnemonics free
Abstract: 1226d 80286 microprocessor pin out diagram 8086 Programmers Reference Manual 8086 opcode sheet free 80287 microprocessor block diagram and pin diagram Opcode list of 8086 microprocessor 80287
Text: intgl lntel387TM DX MATH COPROCESSOR High Performance 80-Bit Internal Architecture • Upward Object-Code Compatible from 8087 and 80287 Implements ANSI/IEEE Standard 7541985 for Binary Floating-Point Arithmetic l Full-Range Transcendental Operations for SINE, COSINE, TANGENT,
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lntel387TM
Virtual-8086
lntel386TM
80-Bit
68-Pin
Hz-33
ASM286
8086 opcode sheet with mnemonics free
1226d
80286 microprocessor pin out diagram
8086 Programmers Reference Manual
8086 opcode sheet free
80287 microprocessor block diagram and pin diagram
Opcode list of 8086 microprocessor
80287
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M803
Abstract: D1351 M17S 1387T M80286 i387 i386 ex board M8038 i386 SL
Text: in te i MILITARY ¡387 MATH COPROCESSOR • Full-Range Transcendental Operations for SINE, COSINE, TANGENT, ARCTANGENT and LOGARITHM High Performance 80-Bit Internal Architecture Implements ANSI/IEEE Standard 7541985 for Binary Floating-Point Arithmetic
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387TM
Virtual-8086
80-Bit
68-Pin
68-Lead
M8087/M80287
M8087
M80287
386tm
M803
D1351
M17S
1387T
M80286
i387
i386 ex board
M8038
i386 SL
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HSP50210 MARCH 1996
Abstract: No abstract text available
Text: ffï H A R R I S H S E M I C O N D U C T O R S P 5 2 1 Digital Costas Loop March 1996 Features Description • Selectable Matched Filtering with Root Raised Cosine or Integrate and Dump Filter The Digital Costas Loop DCL performs many of the base band processing tasks required for the demodulation of
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HSP50110
1-800-4-HARRIS
00bST3b
HSP50210 MARCH 1996
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