Untitled
Abstract: No abstract text available
Text: SN54HC393, SN74HC393 DUAL 4-BIT BINARY COUNTERS SCLS143B – DECEMBER 1982 – REVISED MAY 1997 D D D D Dual 4-Bit Binary Counters With Individual Clocks Direct Clear for Each 4-Bit Counter Can Significantly Improve System Densities by Reducing Counter Package
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SN54HC393,
SN74HC393
SCLS143B
300-mil
SN54HC393
SN74HC393
HC393
4100012A
JM38510/66309BCA
SN54HC393J
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GR-1400
Abstract: No abstract text available
Text: PHAST-12E Device Programmable, High-Performance ATM/PPP/TDM SONET/SDH Terminator for Level 12 with Enhanced Features TXC-06212 TECHNICAL OVERVIEW LINE SIDE Serial LIU Clocks The PHAST-12E is a highly integrated SONET/SDH terminator device designed for ATM cell, frame, higher order multiplexing,
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PHAST-12E
TXC-06212
STS-12/STS-12c/STM-4/STM-4c,
STS-12/STS-12c/STM-4/STM-4c
STS-12,
TXC-06212-MA
GR-1400
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Untitled
Abstract: No abstract text available
Text: P2I2305NZ 3.3V 1:5 Clock Buffer Functional Description P2I2305NZ is a low cost high speed buffer designed to accept one clock input and distribute up to five clocks in mobile PC systems and desktop PC systems. The device operates at 3.3 V and outputs can run
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P2I2305NZ
P2I2305NZ/D
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Untitled
Abstract: No abstract text available
Text: Product Preview CMX7031 The Two-Way Radio Processor PP/7031/4 Analogue Radio Baseband Processor with RF Synthesisers, System Clocks and Auxiliary ADCs and DACs Features Applications • Complete audio processing • • o Digital gain control, filtering, companding, pre/de-emphasis,
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CMX7031
PP/7031/4
100Mz
600MHz
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Untitled
Abstract: No abstract text available
Text: NSL001 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state Rev. 1 — 19 November 2012 Product data sheet 1. General description The NSL001 is an 8-stage serial shift registers with a storage register and 3-state outputs. The registers have separate clocks.
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NSL001
NSL001
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S40S
Abstract: IrDA msp430 F6633 msp430x5 01A14 F6632 SLAS566C
Text: MSP430F663x www.ti.com SLAS566C – JUNE 2010 – REVISED AUGUST 2012 MIXED SIGNAL MICROCONTROLLER FEATURES 1 • • 2 • • • • Low Supply Voltage Range: 1.8 V to 3.6 V Ultralow Power Consumption – Active Mode AM : All System Clocks Active: 270 µA/MHz at 8 MHz, 3.0 V, Flash Program
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MSP430F663x
SLAS566C
16-Bit
20-MHz
S40S
IrDA msp430
F6633
msp430x5
01A14
F6632
SLAS566C
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Untitled
Abstract: No abstract text available
Text: Micrel PRECISION 1:8 LVPECL FANOUT BUFFER WITH 2:1 RUNT PULSE ELIMINATOR INPUT MUX SY89837U Precision Edge SY89837U FEATURES • Selects between two clocks, and provides 8 precision, low skew LVPECL output copies ■ Guaranteed AC performance over temperature and
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SY89837U
SY89837U
975ps
180ps
10pspp
800mV
M9999-091404
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MSP430F5438
Abstract: ADC12 MSP430 MSP430F5419 SLAU208 MSP430F5438 user guide ADC12SHSx
Text: MSP430F543x, MSP430F541x www.ti.com SLAS612C – AUGUST 2009 – REVISED MARCH 2010 MIXED SIGNAL MICROCONTROLLER FEATURES 1 • • • • • • Low Supply Voltage Range: 2.2 V to 3.6 V Ultralow Power Consumption – Active Mode AM : All System Clocks Active
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MSP430F543x,
MSP430F541x
SLAS612C
MSP430F5438
ADC12
MSP430
MSP430F5419
SLAU208
MSP430F5438 user guide
ADC12SHSx
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SLAS645F
Abstract: MSP430 MSP430F5510 SLAU208 MSP430F5509IRGZT SLAS645
Text: MSP430F550x, MSP430F5510 SLAS645F – JULY 2009 – REVISED MARCH 2011 www.ti.com MIXED SIGNAL MICROCONTROLLER FEATURES 1 • • • • • • Low Supply-Voltage Range, 1.8 V to 3.6 V Ultra-Low Power Consumption – Active Mode AM All System Clocks Active
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MSP430F550x,
MSP430F5510
SLAS645F
SLAS645F
MSP430
MSP430F5510
SLAU208
MSP430F5509IRGZT
SLAS645
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05H-07H
Abstract: No abstract text available
Text: MSP430F532x SLAS678C – AUGUST 2010 – REVISED NOVEMBER 2011 www.ti.com MIXED SIGNAL MICROCONTROLLER FEATURES 1 • • 2 • • • • Low Supply-Voltage Range: 1.8 V to 3.6 V Ultralow Power Consumption – Active Mode AM : All System Clocks Active 290 µA/MHz at 8 MHz, 3 V, Flash Program
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MSP430F532x
SLAS678C
05H-07H
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82430MX
Abstract: ICS9159-12 ICS9159F-12
Text: Integrated Circuit Systems, Inc. ICS9159-12 Frequency Generator and Buffers for Mobile Pentium Systems General Description The ICS9159-12 generates all clocks required for mobile microprocessor systems based on Pentium/Mobile Triton chip sets. Three different reference frequency multiplying
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ICS9159-12
ICS9159-12
ICS9159F-12
82430MX
ICS9159F-12
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74LVC595A
Abstract: 74LVC595ABQ 74LVC595AD 74LVC595APW DHVQFN16 TSSOP16
Text: 74LVC595A 8-bit serial-in/serial-out or parallel-out shift register; 3-state Rev. 01 — 29 May 2007 Product data sheet 1. General description The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks.
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74LVC595A
74LVC595A
74LVC595ABQ
74LVC595AD
74LVC595APW
DHVQFN16
TSSOP16
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54F193
Abstract: 54F193DC M193
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 01/20/98 Last Update Date: 03/23/98 Last Major Revision Date: 01/20/98 CN54F193-X REV 0A0 UP/DOWN BINARY COUNTER WITH SEPARATE UP/DOWN CLOCKS General Description The F193 is an up/down modulo-16 binary counter. Separate Count Up and Count Down Clocks
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CN54F193-X
modulo-16
M0002773
54F193
54F193DC
M193
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200MHZ
Abstract: SEL24 W83194BR-138 6867
Text: W83194BR-138 200MHZ CLOCK FOR SOLANO CHIPSET 1.0 GENERAL DESCRIPTION The W83194BR-138 is a Clock Synthesizer for Intel 815 Solano chipset. W83194BR-138 provides all clocks required for high-speed RISC or CISC microprocessor and also provides 64 different frequencies of CPU, SDRAM, PCI, 3V66, IOAPIC clocks frequency setting. All clocks are externally
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W83194BR-138
200MHZ
W83194BR-138
SEL24
6867
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TMS4116
Abstract: TMS4132
Text: MOS LSI TMS 4132 JDL 32,768-BIT DYNAMIC RANDOM-ACCESS MEMORY NOVEMBER 1979 32,768 «AX SUPPLY 1 X 1 Organization 10% Tolerance on All Supplies • All Inputs Including Clocks TTL-Compatible
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768-BIT
18-PIN
200ACCESS
4132JD
TMS4116
TMS4132
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ic tl 741
Abstract: S47C256
Text: AD V A N C E INFORM ATION TM S47C256 32,768-W ORD BY 8-BIT R EAD -O N LY M EM O R Y NOVEM BER 1 9 8 5 3 2 ,7 6 8 X 8 Organization N PACKAGE TOP VIEW Fully Static (No Clocks. No Refresh) NC C 1 y j 2 Q : 27 : A12 C 2 A7 C 3 26 : All Inputs and Outputs TTL Compatible
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S47C256
256-1S
ic tl 741
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1414f
Abstract: QFP144-P-2626B QFP44-P-1414F RTC Real Time Clocks TC8521AM TC8512BY MC68B45
Text: Microcomputer Peripheral Controller LSI RTC Real Time Clocks Group Name Parts Name Function Summary Package TC8521AP DIP18-P-300A TC8521AM SOP20-P-300 RTC-2A Real Time Clock for Micro Computer. Hour, minutes, second, month, day, day of the week and year count with leap year operation. 4-bit I/O CPU Direct.
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TC8521AP
TC8521AM
OP20-P-300
DIP18-P-300A
TC8505AP
TC8505AF
DIP40-P-600
QFP44-P-1414F
MC68B45
TC8506M
1414f
QFP144-P-2626B
RTC Real Time Clocks
TC8512BY
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AS 15 -g
Abstract: LW2J
Text: TYPES SN54276, SN74276 QUADRUPLE J-K FLIP-FLOPS O C T O B E R 1 9 7 6 — R E V IS E D D E C E M B E R 1 9 8 3 features • Four J-K Flip-Flops in a Single Package . . . Can Reduce FF Package Count by 50% • Separate Negative-Edge-Triggered Clocks with Hysteresis , . . Typically 200 mV
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SN54276,
SN74276
AS 15 -g
LW2J
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74LS74N
Abstract: 6502a M6502 UM6512C 4LS74 UM6502C um6502 M6507
Text: U IVS C UM 6502 0 7 12 8-bit Microprocessor Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Addressable memory range of up to 64K bytes "R ead y" input Direct memory access capability Bus compatible with MC6800 Choice of external or on-board clocks
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MC6800
UM6502/UM6507/UM6512
UM6502
UM6507
UM6512
UM6502B
UM6512B
UM6502C
UM6512C
74LS74N
6502a
M6502
4LS74
M6507
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Untitled
Abstract: No abstract text available
Text: TMS47128 16,384-WORD BY 8-BIT READ-ONLY MEMORY JU N E 1 9 8 3 - N PACKAGE 1 6 ,3 8 4 X 8 Organization TOP VIEW Fully Static (No Clocks, No Refresh) NC £ 1 All Inputs and Outputs TTL Compatible 2 8 3 V CC 2 7 3 S 2 /S 2 A 12 £ 2 A 7C 3 Single 5-V Power Supply
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TMS47128
384-WORD
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TMS47C256 ROM
Abstract: No abstract text available
Text: TE XA S INS TR -CASIC/NEHORY} 77 ADVANCE INFORMATION 0^1725 DE 0040=107 4 | ~ TMS47C256 32,768-WORD BY 8-BIT READ-ONLY M EM O RY NOVEMBER 1985 N PACKAGE • 32,768 X 8 Organization • Fully Static No Clocks, No Refresh • All Inputs and Outputs TTL Compatible
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TMS47C256
768-WORD
TMS47C256 ROM
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2332 eprom
Abstract: PIN-20 IC DIAGRAM 2332 rom 2732A eprom
Text: TMS2332 4096-WORD BY 8-BIT READ-ONLY MEMORY SEPTEMBER 1984 - REVISED NOVEMBER 1985 4 0 9 6 X 8 Organization N PACKAGE All Inputs and Outputs TTL Compatible TOP VIEW A 7 C 1 ^ 2 4 3 v Cc A6£ 2 23 3 A 8 A5 £ 3 22 > 9 Fully Static (No Clocks. No Refresh)
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TMS2332
4096-WORD
2332 eprom
PIN-20 IC DIAGRAM
2332 rom
2732A eprom
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TMS47256
Abstract: S124C 47256
Text: TMS47256 32,768-WORD BY 8-BIT READ-ONLY MEMORY JUNE 1 9 8 3 - N PACKAGE 3 2 ,7 6 8 X 8 Organization [TOP VIEW Fully Static No Clocks, No Refresh) NCC 1 W 2 8 27 A12C 2 26 A7 C 3 25 A6 C 4 24 A5 C 5 23 A4 C 6 22 A3 C 7 21 A2 C 8 20 A lC 9 AO C 10 19 Q l C 11 18
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TMS47256
768-WORD
27C256
S124C
47256
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222A1
Abstract: No abstract text available
Text: TMX27PC210 1,048,576-BIT PROGRAMMABLE READ ONLY MEMORY J A N U A R Y 1988 • Wide-Word Organization . . . 64K x 16 • Single 5-V Power Supply N PA C KA G E TOP VIEWI 40-Pin Dual-In-line Package • All Inputs and Outputs Fully TTL Compatible • Static Operation (No Clocks, No Refresh
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TMX27PC210
576-BIT
40-Pin
16-Bng
222A1
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