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    Part ECAD Model Manufacturer Description Download Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / HTSSOP28 Visit Toshiba Electronic Devices & Storage Corporation
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    CLOCKED Price and Stock

    American Electrical Inc C-LOCK

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Onlinecomponents.com C-LOCK
    • 1 $62.3
    • 10 $7.79
    • 100 $4.45
    • 1000 $3.99
    • 10000 $3.99
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    Amphenol Corporation 7012-1979

    RF Cable Assemblies SMP Female R/A to SMP Female R/A 12" 180° Clocked Cable Assembly for .047 Cable
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    TTI 7012-1979 Each 2 1
    • 1 $172.72
    • 10 $164.49
    • 100 $161.27
    • 1000 $161.27
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    Amphenol Corporation 7012-1980

    RF Cable Assemblies FLCA SMA -SMA RJ-RJ 6.0"
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    TTI 7012-1980 Each 2 1
    • 1 $160.75
    • 10 $147.51
    • 100 $137.11
    • 1000 $137.11
    • 10000 $137.11
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    Amphenol Corporation 7012-1981

    RF Cable Assemblies FLCA SMA -SMA RJ-RJ 12.0"
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    TTI 7012-1981 Each 2 1
    • 1 $173.03
    • 10 $139.44
    • 100 $118.86
    • 1000 $118.86
    • 10000 $118.86
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    Amphenol Corporation 7012-1982

    RF Cable Assemblies FLCA SMA -SMA RJ-RJ 6.0"
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    TTI 7012-1982 Each 2 1
    • 1 $162.46
    • 10 $149.08
    • 100 $138.57
    • 1000 $138.57
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    CLOCKED Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36


    Original     		PDF SN54ACT3641 SGBS309A 5962-9560801QYA 5962-9560801NXD SCAA013A SCAA008A SCLA008 SZZU001B, SDYU001N, SCET004,

    IW4042BD

    Abstract: IW4042BN
    Text: TECHNICAL DATA IW4042B Quad Clocked «D» Latch High-Voltage Silicon-Gate CMOS IW4042B types contain four latch circuits, each strobed by a common clock. Complementary buffered outputs are available from each circuit. The impedance of the n- and p-channel output devices is balanced and all


    Original     		PDF IW4042B IW4042B 012AC) IW4042BD IW4042BN

    CY7C4255V

    Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V
    Text: fax id: 5422 CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V PRELIMINARY 8K/16K/32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to


    Original     		PDF CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 8K/16K/32K/64Kx18 CY7C4255/65/75/85V CY7C42X5V CY7C4255V CY7C4265V CY7C4275V CY7C4285V

    r2s3

    Abstract: CD40192B CD40192BMS CD40193B CD40193BMS
    Text: CD40192BMS CD40193BMS CMOS Presettable Up/Down Counters Dual Clock With Reset December 1992 Features Description • CD40192BMS - BCD Type CD40192BMS Presettable BCD Up/Down Counter and the CD40193BMS Presettable Binary Up/Down Counter each consist of 4 synchronously clocked, gated “D” type flip-flops connected as a counter. The inputs consist of 4 individual jam lines,


    Original     		PDF CD40192BMS CD40193BMS CD40192BMS CD40193BMS r2s3 CD40192B CD40193B

    C4558

    Abstract: C4554 C4557 c455 CY7C455-14JI CY7C455 CY7C456 CY7C457 CY7C447
    Text: CY7C455 CY7C456 CY7C457 512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags • Depth Expansion Capability • 52-pin PLCC and 52-pin PQFP Features • High-speed, low-power, first-in first-out FIFO memories • 512 x 18 (CY7C455)


    Original     		PDF CY7C455 CY7C456 CY7C457 52-pin CY7C455) CY7C456) CY7C457) 83-MHz C4558 C4554 C4557 c455 CY7C455-14JI CY7C455 CY7C456 CY7C457 CY7C447

    Untitled

    Abstract: No abstract text available
    Text: SN54ABT3614 64 x 36 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SGBS308F – AUGUST 1995 – REVISED MAY 2000 D D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Two Independent 64 × 36 Clocked FIFOs


    Original     		PDF SN54ABT3614 SGBS308F

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227E – FEBRUARY 1993 – REVISED APRIL 1998 D D D D D Member of the Texas Instruments Widebus Family Independent Asynchronous Inputs and Outputs Read and Write Operations Can Be Synchronized to Independent System


    Original     		PDF SN74ACT7881 SCAS227E SN74ACT7882, SN74ACT7884, SN74ACT7811 50-pF 68-Pin 80-Pin D17udio

    Untitled

    Abstract: No abstract text available
    Text: SN74GTLPH32912 36-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER www.ti.com FEATURES • • • • • • • Member of the Texas Instruments Widebus+ Family UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, and


    Original     		PDF SN74GTLPH32912 36-BIT SCES379A

    Untitled

    Abstract: No abstract text available
    Text: SN54ABT7819 512 x 18 × 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SGBS305D – AUGUST 1994 – REVISED APRIL 1998 D D D D D D D Member of the Texas Instruments Widebus Family Advanced BiCMOS Technology Free-Running CLKA and CLKB Can Be Asynchronous or Coincident


    Original     		PDF SN54ABT7819 SGBS305D 50-pF

    Untitled

    Abstract: No abstract text available
    Text: HD74LS165A Parallel-Load 8-bit Shift Register REJ03D0449–0300 Rev.3.00 Jul.15.2005 The LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual direct data inputs that are enabled by a low level at the shift /


    Original     		PDF HD74LS165A REJ03D0449â LS165A

    Untitled

    Abstract: No abstract text available
    Text: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227C - FEBRUARY 1993 - REVISED FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Input-Ready, Output-Ready, and Half-Full Flags


    OCR Scan     		PDF SN74ACT7881 SCAS227C SN74ACT7882, SN74ACT7884, SN74ACT7811 50-pF 68-Pin 80-Pln DO-D17

    CIRCUIT DIAGRAM OF Bf 199

    Abstract: No abstract text available
    Text: TC4042BP/BF/BFN C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4042B QUAD CLOCKED "D " LATCH_ TC4042B contains fo u r circuits o f "D " type latches having common CLOCK input and POLARITY input. W hen POLARITY input is placed at "H " level, D input appears


    OCR Scan     		PDF TC4042BP/BF/BFN TC4042B CIRCUIT DIAGRAM OF Bf 199

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC16601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JANUARY 1993 DGG OR DL PACKAGE TOP VIEW UBT (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Mode


    OCR Scan     		PDF SN74ALVC16601 18-BIT MIL-STD-883C,

    TC4042BP

    Abstract: IS902
    Text: TC4042BP/BF C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4042BP/TC4042BF QUAD CLOCKED "D" LATCH TC4042BP/BF contains four circuits of MD" type latches having common CLOCK input and POLARITY input. When POLARITY input is placed at "H" level, D input


    OCR Scan     		PDF TC4042BP/BF TC4042BP/TC4042BF TC4042BP/BF TC4042BP IS902

    truth table inverter gate 74

    Abstract: 74HC74
    Text: 6. HOW TO R E A D MI L T Y PE LOGIC S Y M B O LS A ND TRUTH TA B L ES 6 -1 H o w to read M I L typo L o g ic S y m b o l* Tkble 6-1 shows the MIL type logic symbols used in high-speed CMOS IC This logical chart is based on M1L-STD-806B. Clocked inverters and transmission gates employ specific symbols.


    OCR Scan     		PDF M1L-STD-806B. HC-73 HC-74 truth table inverter gate 74 74HC74

    Untitled

    Abstract: No abstract text available
    Text: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A - AUGUST 1995 - REVISED APRIL 1998 • Free-Running CLKA and CLKB Can Be Asynchronous or Coincident • Output-Ready and Almost-Empty Flags Synchronized by CLKB • Clocked FIFO Buffering Data From Port A


    OCR Scan     		PDF SN54ACT3641 SGBS309A 5962-9560801QYA 5962-9560801NXD

    Untitled

    Abstract: No abstract text available
    Text: f¡J PERICOM Product Features: Com mon Features: • PI74FCT16511 and PI74FCT162511 are high-speed, low power devices with high current drive. • Vcc = 5V +10% • Typical tsk o (Output Skew) < 250 ps, clocked mode


    OCR Scan     		PDF PI74FCT16511 PI74FCT162511 56-pin PI74FCT16511T PI74FCT162511T PS2080A

    Transmission gate IC

    Abstract: MIL-STD-806B
    Text: 6. HOW TO R E A D M I L T Y P E LOGIC S Y M B O L S A N D T R U T H T A B L E S 6-1 How to read M IL type Logic Sym bols Tkble 6-1 shows the MIL type logic symbols used in high-speed CMOS IC. This logic chart is based on MIL-STD-806B. Clocked inverters and transmission gate, employ specific symbols.


    OCR Scan     		PDF MIL-STD-806B. AC-30 Transmission gate IC MIL-STD-806B

    Untitled

    Abstract: No abstract text available
    Text: Ordering number : EN8S6089A CMOS LSI No. 5K5089A SAXYO LC374100RP, RM-10/LC374100RP, RM-20LV 4 MEG 524288 words x 8 bits Mask ROM Internal Clocked Silicon Gate Preliminary Overview Package Dimensions The LC374100RP, RM-10 and LC374100RP, RM-20LV are 4 1 94304-bit M ask Program m able Read Only


    OCR Scan     		PDF EN8S6089A 5K5089A LC374100RP, RM-10/LC374100RP, RM-20LV 3192-DIP32 RM-10

    1 m preset

    Abstract: No abstract text available
    Text: SPEED/PACKAGE AVAILABILITY 54 F,W 54LS F,W PIN CONFIGURATION 74 B 74LS B B,F,W PACKAGE INFUT » .E DESCRIPTION 3 v cc r^ D A T * a This monolithic circuit is a synchronous reversible up/down counter having a complexity of 55 equivalent gates. Synchronous operation is provided by having all flip-flops clocked


    OCR Scan     		PDF 1N3064 1 m preset

    CI 7473

    Abstract: A10C SN74ABT7819
    Text: SN74ABT7819 512 x 18 x 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS125B —JULY 1992 - REVISED AUGUST 1934 Microprocessor Interface Control Logic Programmable Almost-Full/Almost-Empty Flags Fast Access Times of 9 ns With a 50-pF Load and Simultaneous Switching Data


    OCR Scan     		PDF SN74ABT7819 SCBS125B 50-pF 80-Pin bl723 CI 7473 A10C SN74ABT7819

    sf 127d

    Abstract: 127D IC51-1324-828 SN74ABT3611 D103E
    Text: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS127D - JULY 1992 - REVISED SEPTEMBER 1995 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 x 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction


    OCR Scan     		PDF SN74ABT3611 SCBS127D 120-Pin 132-Pin Q103E1S sf 127d 127D IC51-1324-828 D103E

    MC889P

    Abstract: MC723P MC700P mc723 pj 56 diode MC816P laputa MC816 uln series -driver
    Text: as wfumops \' P L A S T IC M R T L MC700P/800P series M C723P • MC816P J-K flip-flop with a direct clear input in addition to the clocked inputs. CLOCKED INPUT ftPCJIATIM <1> U+KD t-D i l l 3 1 2 - S » 1 (5) 2 - * T [11 <3} 3 -a C Co ^


    OCR Scan     		PDF MC700P/800P MC723P MC816P MC889P MC723P MC700P mc723 pj 56 diode MC816P laputa MC816 uln series -driver

    SN74ACT7811

    Abstract: SN74ACT7881 SN74ACT7882 SN74ACT7884
    Text: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227A- FEBRUARY 1993 - REVISED JUNE 1994 Member of the Texas Instruments Wldebus Family * Input-Ready, Output-Ready, and Half-Full Flags Independent Asynchronous Inputs and Outputs Read and Write Operations Can Be


    OCR Scan     		PDF SN74ACT7881 SCAS227A- SN74ACT7882, SN74ACT7884, SN74ACT7811 50-pF 68-Pin 80-Pin D0-D17 SN74ACT7811 SN74ACT7881 SN74ACT7882 SN74ACT7884