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    CLOCK DRIVER Search Results

    CLOCK DRIVER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    TB67S589FNG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver / Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / CLK input type / HTSSOP28 Visit Toshiba Electronic Devices & Storage Corporation

    CLOCK DRIVER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    AN1545

    Abstract: MPC9993 MPC99J93
    Text: Freescale Semiconductor Technical Data MPC99J93 DATA Rev 3, SHEET 05/2005 Intelligent Dynamic Clock Switch Intelligent Dynamic Clock Switch IDCS PLL Clock Driver (IDCS) PLL Clock Driver MPC99J93 MPC99J93 The MPC99J93 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC99J93 MPC99J93 199707558G AN1545 MPC9993

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET MPC99J93 Freescale Semiconductor Technical Data Rev 3, 05/2005 MPC99J93 Intelligent Dynamic Clock Switch Intelligent Dynamic IDCS PLL Clock Driver Clock Switch MPC99J93 (IDCS) PLL Clock Driver The MPC99J93 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC99J93 MPC99J93 32-Lead 199707558G

    Untitled

    Abstract: No abstract text available
    Text: Freescale Semiconductor Technical Data DATAMPC9993 SHEET Rev 3, 06/2005 Intelligent Dynamic Clock Switch Intelligent Dynamic Clock Switch IDCS PLL Clock Driver (IDCS) PLL Clock Driver MPC9993 MPC9993 The MPC9993 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC9993 32-Lead MPC9993Pacific 199707558G

    AN1545

    Abstract: MC88915 MPC9448 MPC9993
    Text: DATA SHEET MPC9993 Freescale Semiconductor Technical Data Rev 3, 06/2005 MPC9993 Intelligent Dynamic Clock Switch Intelligent Dynamic IDCS PLL Clock Driver Clock Switch MPC9993 (IDCS) PLL Clock Driver The MPC9993 is a PLL clock driver designed specifically for redundant clock


    Original     		PDF MPC9993 MPC9993 199707558G AN1545 MC88915 MPC9448

    ti 6346

    Abstract: 440LX CDC9441
    Text: CDC9441 PC CLOCK SYNTHESIZER/DRIVER WITH SDRAM CLOCK SUPPORT SCAS578 – AUGUST 1996 D D D D D D DL PACKAGE TOP VIEW Clock Generation for Intel 440LX Chipset Four CPU Clock Outputs With Programmable Frequency Twelve SDRAM Clock Outputs Seven PCI Clock Outputs


    Original     		PDF CDC9441 SCAS578 440LX 318-MHz 31818-MHz SDRAM11 SDRAM10 CDC9441 ti 6346

    LQFP-32

    Abstract: MC100ES6226 MC100ES6226AC MC100ES6226ACR2 MC100ES6226FA MC100ES6226FAR2
    Text: MC100ES6226 2.5V/3.3V DIFFERENTIAL LVPECL 1:9 CLOCK DISTRIBUTION BUFFER AND CLOCK DRIVER The MC100ES6226 is a bipolar monolithic differential clock distribution buffer and clock divider. Designed for most demanding clock distribution systems, the MC100ES6226


    Original     		PDF MC100ES6226 MC100ES6226 LQFP-32 MC100ES6226AC MC100ES6226ACR2 MC100ES6226FA MC100ES6226FAR2

    CDC9163

    Abstract: 430VX
    Text: CDC9163 PC CLOCK SYNTHESIZER/DRIVER WITH SDRAM CLOCK SUPPORT SCAS574 – JULY 1996 D D D D D D D D D Clock Generation for Pentium/430VX Motherboards Twelve Host Clock Outputs With Programmable Frequency Six PCI Clock Outputs One Serial Bus 48-MHz Clock


    Original     		PDF CDC9163 SCAS574 /430VX 48-MHz 24-MHz 318-MHz 31818-MHz HCLK12 HCLK11 CDC9163 430VX

    Untitled

    Abstract: No abstract text available
    Text: xr XRK79993 INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER DECEMBER 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRK79993 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK79993 XRK79993

    XRK7955

    Abstract: No abstract text available
    Text: xr XRK7955 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER MARCH 2005 REV. P1.0.1 GENERAL DESCRIPTION The XRK7955 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK7955 XRK7955

    XRK79993IQ

    Abstract: No abstract text available
    Text: xr XRK79993 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER SEPTEMBER 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRK79993 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK79993 XRK79993 XRK79993IQ

    XRK79892

    Abstract: XRK79892IQ
    Text: xr XRK79892 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER SEPTEMBER 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRK79892 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK79892 XRK79892 XRK79892IQ

    75MHZ

    Abstract: XRK799J93 XRK799J93IQ
    Text: xr XRK799J93 INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER DECEMBER 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRK799J93 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK799J93 XRK799J93 75MHZ XRK799J93IQ

    XRK7988

    Abstract: No abstract text available
    Text: xr XRK7988 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER MARCH 2005 REV. P1.0.1 GENERAL DESCRIPTION The XRK7988 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK7988 XRK7988

    XRK7933

    Abstract: No abstract text available
    Text: xr XRK7933 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER MARCH 2005 REV. P1.0.1 GENERAL DESCRIPTION The XRK7933 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK7933 XRK7933

    XRK79892

    Abstract: XRK79892IQ
    Text: xr XRK79892 PRELIMINARY INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER JANAUARY 2005 REV. P1.0.1 GENERAL DESCRIPTION The XRK79892 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals


    Original     		PDF XRK79892 XRK79892 XRK79892IQ

    transistor x1

    Abstract: IDT49FCT805 49FCT805A 49FCT806 AN-82 IDT49FCT805A IDT49FCT806 IDT74FCT244A
    Text: CLOCK DISTRIBUTION SIMPLIFIED WITH IDT GUARANTEED SKEW CLOCK DRIVERS  Integrated Device Technology, Inc. APPLICATION NOTE-82 CLOCK DISTRIBUTION SIMPLIFIED WITH IDT GUARANTEED SKEW CLOCK DRIVERS APPLICATION NOTE AN-82 By Michel Conrad INTRODUCTION WHAT IS CLOCK SKEW ?


    Original     		PDF NOTE-82 AN-82 50Mhz, AN-49" transistor x1 IDT49FCT805 49FCT805A 49FCT806 AN-82 IDT49FCT805A IDT49FCT806 IDT74FCT244A

    Untitled

    Abstract: No abstract text available
    Text: NB100LVEP224 2.5V/3.3V 1:24 Differential ECL/PECL Clock Driver with Clock Select and Output Enable http://onsemi.com Description The NB100LVEP224 is a low skew 1-to-24 differential clock driver, designed with clock distribution in mind, accepting two clock


    Original     		PDF NB100LVEP224 NB100LVEP224 1-to-24 NB100LVEP224/D

    405C

    Abstract: LVEP224 NB100LVEP224 Socket IC 80 pin LQFP
    Text: NB100LVEP224 2.5V/3.3V 1:24 Differential ECL/PECL Clock Driver with Clock Select and Output Enable http://onsemi.com Description The NB100LVEP224 is a low skew 1−to−24 differential clock driver, designed with clock distribution in mind, accepting two clock


    Original     		PDF NB100LVEP224 NB100LVEP224 1-to-24 NB100LVEP224/D 405C LVEP224 Socket IC 80 pin LQFP

    AN1545

    Abstract: MPC9993 MPC99J93
    Text: Freescale Semiconductor Technical Data MPC99J93 Rev 3, 05/2005 Intelligent Dynamic Clock Switch IDCS PLL Clock Driver MPC99J93 The MPC99J93 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from


    Original     		PDF MPC99J93 MPC99J93 32-Lead AN1545 MPC9993

    Untitled

    Abstract: No abstract text available
    Text: CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _SCAS379B - FEBRUARY 1993 - REVISED FEBRUARY 1996 Low Output Skew for Clock-Dlstrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vcc Distributes Differential LVPECL Clock


    OCR Scan     		PDF CDC2582 SCAS379B SCAS379B-FEBRUARY 6S5303»

    Untitled

    Abstract: No abstract text available
    Text: CDC582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _ SCAS446B - JULY 1994- REVISED FEBRUARY 1996 Low Output Skew for Clock-Dlstrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vqc Distributes Differential LVPECL Clock


    OCR Scan     		PDF SCAS446B CDC582 52-Pin

    Untitled

    Abstract: No abstract text available
    Text: CDC582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _ SCAS446B - JULY 1994 - REVISED FEBRUARY 1996 Low Output Skew for Clock-Dlstrlbutton and Clock-Generatlon Applications Operates at 3.3-V Vcc Distributes Differential LVPECL Clock


    OCR Scan     		PDF CDC582 SCAS446B SS5303 7S266

    Untitled

    Abstract: No abstract text available
    Text: CDC2582 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH DIFFERENTIAL LVPECL CLOCK INPUTS _SCAS379B- FEBRUARY 1993 - REVISED FEBRUARY 1996 • • Low Output Skew or Clock-Distrlbutlon and Clock-Generatlon Applications Operates at 3.3-V Vcc Distributes Differential LVPECL Clock


    OCR Scan     		PDF SCAS379B- CDC2582 52-Pin

    SN74ABT337

    Abstract: d358 D3589
    Text: SN74ABT337 CLOCK DRIVER WITH 3-STATE OUTPUTS _ 03589, MAY 1990 * Low Output Skew, Low Pulse Skew for Clock Distribution and Clock Generation Applications * Four Outputs Toggle at the Clock Frequency, Four Outputs Switch at One-Half the Clock Frequency


    OCR Scan     		PDF SN74ABT337 300-mil SN74ABT337 d358 D3589