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    CERAMIC PIN GRID ARRAY PACKAGE LEAD FINISH Search Results

    CERAMIC PIN GRID ARRAY PACKAGE LEAD FINISH Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation

    CERAMIC PIN GRID ARRAY PACKAGE LEAD FINISH Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: Ceramic Package Ceramic Pin Grid Array Packages CPGA S1 G48.A –A– D 48 LEAD CERAMIC PIN GRID ARRAY PACKAGE D1 INCHES –B– S E1 E SYMBOL MIN MAX MIN MAX NOTES A - - - - - A1 0.080 0.120 2.03 3.05 3 b 0.016 0.0215 0.41 0.55 8 b1 0.016 0.020 0.41 0.51


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    5M-1982. PDF

    ceramic pin grid array package

    Abstract: CMGA7-P145C G145 CMGA7-P145
    Text: Ceramic Package Ceramic Pin Grid Array Packages CPGA S1 G145.A MIL-STD-1835 CMGA7-P145C (P-AG) –A– D 145 LEAD CERAMIC PIN GRID ARRAY PACKAGE INCHES D1 –B– S E1 E SYMBOL MIN MAX MIN MAX NOTES A 0.215 0.345 5.46 8.76 - A1 0.070 0.145 1.78 3.68 3 b


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    MIL-STD-1835 CMGA7-P145C 5M-1982. ceramic pin grid array package CMGA7-P145C G145 CMGA7-P145 PDF

    CMGA3-P85C

    Abstract: No abstract text available
    Text: Ceramic Package Ceramic Pin Grid Array Packages CPGA S1 G85.A MIL-STD-1835 CMGA3-P85C (P-AC) –A– D 85 LEAD CERAMIC PIN GRID ARRAY PACKAGE INCHES D1 –B– S E1 E SYMBOL MIN MAX MIN MAX NOTES A 0.215 0.345 5.46 8.76 - A1 0.070 0.145 1.78 3.68 3 b 0.016


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    MIL-STD-1835 CMGA3-P85C 5M-1982. CMGA3-P85C PDF

    CMGA3-P68C

    Abstract: CMGA3-P68 G68 Package G68.A Package
    Text: Ceramic Package Ceramic Pin Grid Array Packages CPGA S1 G68.A MIL-STD-1835 CMGA3-P68C (P-AC) –A– D 68 LEAD CERAMIC PIN GRID ARRAY PACKAGE INCHES D1 –B– S E1 E SYMBOL MIN MAX MIN MAX NOTES A 0.215 0.345 5.46 8.76 - A1 0.070 0.145 1.78 3.68 3 b 0.016


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    MIL-STD-1835 CMGA3-P68C 5M-1982. CMGA3-P68C CMGA3-P68 G68 Package G68.A Package PDF

    CMGA3-P68

    Abstract: G68 Package
    Text: Ceramic Package Ceramic Pin Grid Array Packages CPGA G68.B MIL-STD-1835 CMGA3-P68D (P-AC) S1 68 LEAD CERAMIC PIN GRID ARRAY PACKAGE –A– D INCHES D1 –B– S E1 E SYMBOL MIN MAX MIN MAX NOTES A 0.215 0.345 5.46 8.76 - A1 0.070 0.145 1.78 3.68 3 b 0.016


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    MIL-STD-1835 CMGA3-P68D 5M-1982. CMGA3-P68 G68 Package PDF

    CMGA3-P84C

    Abstract: CMGA3-P84
    Text: Ceramic Package Ceramic Pin Grid Array Packages CPGA G84.A MIL-STD-1835 CMGA3-P84C (P-AC) S1 84 LEAD CERAMIC PIN GRID ARRAY PACKAGE –A– D INCHES D1 –B– S E1 E SYMBOL MIN MAX MIN MAX NOTES A 0.215 0.345 5.46 8.76 - A1 0.070 0.145 1.78 3.68 3 b 0.016


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    MIL-STD-1835 CMGA3-P84C 5M-1982. CMGA3-P84C CMGA3-P84 PDF

    p68d

    Abstract: led matrix circuits CMGA3-P68 G68 Package CMGA3-P68D
    Text: Hermetic Packages for Integrated Circuits Ceramic Pin Grid Array Packages CPGA S1 G68.B MIL-STD-1835 CMGA3-P68D (P-AC) –A– D 68 LEAD CERAMIC PIN GRID ARRAY PACKAGE INCHES D1 –B– S E1 E MIN MAX MIN MAX A 0.215 0.345 5.46 8.76 - 0.070 0.145 1.78 3.68


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    MIL-STD-1835 CMGA3-P68D 5M-1982. p68d led matrix circuits CMGA3-P68 G68 Package CMGA3-P68D PDF

    231369

    Abstract: TQFP 44 PACKAGE footprint NG80386SX16 Side Brazed Ceramic Dual-In-Line Packages CERAMIC PIN GRID ARRAY CPGA lead frame 325 A80486DX-25 TQFP 144 PACKAGE DIMENSION intel order 231369 600E12 BGA and QFP Package
    Text: Package Module PC Card Outlines and Dimensions February 1996 Order Number 231369-012 PACKAGE MODULE PC CARD OUTLINES AND DIMENSIONS Intel Product Identification Codes 231369 – 1 EXAMPLES A80486DX25SX387 32-Bit Microprocessor 25 MHz 168-Lead Ceramic Pin Grid Array


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    A80486DX25SX387 32-Bit 168-Lead NG80386SX16SX159 16-Bit 100-Lead 231369 TQFP 44 PACKAGE footprint NG80386SX16 Side Brazed Ceramic Dual-In-Line Packages CERAMIC PIN GRID ARRAY CPGA lead frame 325 A80486DX-25 TQFP 144 PACKAGE DIMENSION intel order 231369 600E12 BGA and QFP Package PDF

    diode databook package outline

    Abstract: sip Connector, Pitch 2.5mm, 4 pin PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC a5501 A5540 Side Brazed Ceramic Dual-In-Line Packages Side Brazed Ceramic Dual-In-Line Packages 28 EPROM databook 35 x 35 PBGA, 580 100 balls 64 CERAMIC LEADLESS CHIP CARRIER LCC
    Text: Package / Module / PC Card Outlines and Dimensions 2 Intel Product Identification Codes NG 8 3 8 6 S X 1 Up to15 Alphanumeric Characters For Device Types 6 S X 3 8 7 Up to 6 Alphanumeric Characters to Show Customer-Specific Requirements Package Type – –


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    A5579-01 A5580-01 diode databook package outline sip Connector, Pitch 2.5mm, 4 pin PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC a5501 A5540 Side Brazed Ceramic Dual-In-Line Packages Side Brazed Ceramic Dual-In-Line Packages 28 EPROM databook 35 x 35 PBGA, 580 100 balls 64 CERAMIC LEADLESS CHIP CARRIER LCC PDF

    KD 2107

    Abstract: A5515 A5568-01 A54450 PQFP 132 PACKAGE DIMENSION intel A5500-01 A5522-01 A5506 Intel 1702 eprom PACKAGE/MODULE/PC CARD OUTLINES AND DIMENSIONS
    Text: Package / Module / PC Card Outlines and Dimensions 2 Intel Product Identification Codes NG 8 3 8 6 S X 1 Up to15 Alphanumeric Characters For Device Types 6 S X 3 8 7 Up to 6 Alphanumeric Characters to Show Customer-Specific Requirements Package Type A B C


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    A5580-01 KD 2107 A5515 A5568-01 A54450 PQFP 132 PACKAGE DIMENSION intel A5500-01 A5522-01 A5506 Intel 1702 eprom PACKAGE/MODULE/PC CARD OUTLINES AND DIMENSIONS PDF

    MO-143

    Abstract: 172-CQFP 256-CQFP DIMENSIONS PQFP 132 CPGA132 CERAMIC QUAD FLATPACK CQFP
    Text: Package Characteristics and Mechanical Drawings Package Thermal Characteristics Package Type Plastic Leaded Chip Carrier PLCC Plastic Quad Flatpack (PQFP) Pin Count θjc θja θja Still Air 300 ft/min Unit 44 16 43 31 °C/W 68 13 36 25 °C/W 84 12 32 22


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    PBGA329 51xxxxx-x/1 MO-143 172-CQFP 256-CQFP DIMENSIONS PQFP 132 CPGA132 CERAMIC QUAD FLATPACK CQFP PDF

    GI 312 diode

    Abstract: CERAMIC PIN GRID ARRAY CPGA lead frame ceramic pin grid array package wire bond VIC064 CPGA 168 lead frame CERAMIC PIN GRID ARRAY 144 pins VIC068A CERAMIC PIN GRID ARRAY wire lead frame description of transistor bc 148 CY7C964
    Text: Qualification Report November, 1994 - QTP# 93101 Version 1.1 CMOS2AN PROCESS MARKETING PART NUMBER VIC64 DEVICE DESCRIPTION VMEbus Interface Controller with D64 VIC068A VMEbus Interface Controller VAC068A VMEbus Address Controller CY7C964 Bus Interface Logic Circuit


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    VIC64 VIC068A VAC068A CY7C964 VIC64, VIC064/VIC068A 144-pins VIC64/VIC068A/VAC068A/7C964 GI 312 diode CERAMIC PIN GRID ARRAY CPGA lead frame ceramic pin grid array package wire bond VIC064 CPGA 168 lead frame CERAMIC PIN GRID ARRAY 144 pins VIC068A CERAMIC PIN GRID ARRAY wire lead frame description of transistor bc 148 CY7C964 PDF

    88 lead cpga

    Abstract: JEDEC Matrix Tray outlines cpu Shipping Trays outline of the heat slug for JEDEC ceramic pin grid array package wire bond I 6506 PLASTIC PIN GRID ARRAY PACKAGING
    Text: 2 13 An Introduction to Plastic Pin Grid Array PPGA Packaging 1/17/97 9:53 AM CH13WIP.DOC INTEL CONFIDENTIAL (until publication date) 2 CHAPTER 13 AN INTRODUCTION TO PLASTIC PIN GRID ARRAY (PPGA) PACKAGING 13.1. INTRODUCTION As Intel microprocessors become faster, more complex and more powerful, the demand on


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    CH13WIP 88 lead cpga JEDEC Matrix Tray outlines cpu Shipping Trays outline of the heat slug for JEDEC ceramic pin grid array package wire bond I 6506 PLASTIC PIN GRID ARRAY PACKAGING PDF

    ME 1117

    Abstract: MO-113 175-PIN CERAMIC QUAD FLATPACK CQFP CQ208 CQ256 CQ84 PQ100 ceramic pin grid array package lead finish cpga dimensions
    Text: Package Mechanical Drawings S e p t e m b e r 1997 1997 Actel Corporation 1-409 Ceramic Pin Grid Array 84-Pin CPGA .050" ± .010" Pin #1 ID .045 .055 0.18" ± .002" .100" BSC 1.100" ± .020" square .080" .110" L K J H G 1.000 BSC F E D C B A 1 2 3 4 5 6


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    84-Pin 100-Pin MO-136 ME 1117 MO-113 175-PIN CERAMIC QUAD FLATPACK CQFP CQ208 CQ256 CQ84 PQ100 ceramic pin grid array package lead finish cpga dimensions PDF

    PQFP 132 PACKAGE DIMENSION intel

    Abstract: intel DOC pin grid array conductive trace ppga package PpGA jc thermal resistance PLASTIC PIN GRID ARRAY PACKAGING
    Text: B 13 An Introduction to Plastic Pin Grid Array PPGA Packaging 5/10/97 7:47 AM 97_13_1.doc INTEL CONFIDENTIAL (until publication date) B CHAPTER 13 AN INTRODUCTION TO PLASTIC PIN GRID ARRAY (PPGA) PACKAGING 13.1. INTRODUCTION As Intel microprocessors become faster, more complex and more powerful, the demand on


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    ceramic pin grid array package plating

    Abstract: No abstract text available
    Text: Standard Products RadHard Eclipse FPGA Family 6250 and 6325 Advanced Data Sheet May, 2005 www.aeroflex.com/RadHardFPGA FEATURES ‰ Comprehensive design tools include high quality Verilog/ VHDL synthesis and simulation ‰ QuickLogic IP available for microcontrollers, DRAM


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    16-bit MIL-STD-883 120MeV-cm2/mg ceramic pin grid array package plating PDF

    ceramic pin grid array package lead finish gold

    Abstract: 40 lead ceramic flatpack ceramic pin grid array package lead finish EXTERNAL LEAD FINISH FOR HERMETIC PACKAGES 85# Tin Plate gold plate MIL-M38510 lead finish National Semiconductor 16 Pin Dip
    Text: External Lead Finish for Hermetic Packages For hermetic packages, National Semiconductor offers three primary lead finishes: solder dip, gold plate and tin plate. The component lead finish serves as a protective coating to prevent oxidation of the lead base material prior to use. The


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    Mil-M-38510. ceramic pin grid array package lead finish gold 40 lead ceramic flatpack ceramic pin grid array package lead finish EXTERNAL LEAD FINISH FOR HERMETIC PACKAGES 85# Tin Plate gold plate MIL-M38510 lead finish National Semiconductor 16 Pin Dip PDF

    64 pin CERAMIC QUAD FLATPACK

    Abstract: No abstract text available
    Text: Standard Products RadHard Eclipse FPGA Advanced Data Sheet August, 2004 www.aeroflex.com/RadHardFPGA ‰ Comprehensive design tools include high quality Verilog/ VHDL synthesis and simulation ‰ QuickLogic IP available for microcontrollers, DRAM controllers, USART and PCI


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    16-bit MIL-STD-883 100MeV-cm2/mg 64 pin CERAMIC QUAD FLATPACK PDF

    CERAMIC QUAD FLATPACK CQFP 96

    Abstract: No abstract text available
    Text: Standard Products RadHard Eclipse FPGA Advanced Data Sheet September, 2004 www.aeroflex.com/RadHardFPGA ‰ Comprehensive design tools include high quality Verilog/ VHDL synthesis and simulation ‰ QuickLogic IP available for microcontrollers, DRAM controllers, USART and PCI


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    16-bit MIL-STD-883 100MeV-cm2/mg CERAMIC QUAD FLATPACK CQFP 96 PDF

    ppga package

    Abstract: CPGA large cavity ceramic pin grid array package wire bond PLASTIC PIN GRID ARRAY PACKAGING
    Text: Plastic Pin Grid Array PPGA Packaging 13.1 13 Introduction As Intel microprocessors become faster, more complex and more powerful, the demand on package performance increases. Improvements in microprocessor speed and functionality drive package design improvements in electrical, thermal and mechanical performance. Package electrical and


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    outline of the heat slug for JEDEC

    Abstract: outline of the heat sink for JEDEC power led heat sink diode databook diode databook package outline heat slug for JEDEC intel pin grid array package ppga package datasheet CPGA large cavity Intel CPGA with 68 pins
    Text: Plastic Pin Grid Array PPGA Packaging 13.1 13 Introduction As Intel microprocessors become faster, more complex and more powerful, the demand on package performance increases. Improvements in microprocessor speed and functionality drive package design improvements in electrical, thermal and mechanical performance. Package electrical and


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    Untitled

    Abstract: No abstract text available
    Text: www.cadeka.com TMC2246A Image Filter 11 x 10 bit, 60 MHz Features Applications • • • • • • • • • • • • • 60 MHz computation rate 60 MHz data and coefficient input Four 11 x 10-bit multipliers Individual data and coefficient inputs


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    TMC2246A 10-bit 25-Bit 16-bit 120-pin 2246AH5C2 TMC2246AH6C TMC2246AH6C1 TMC2246AH6C2 TMC2246AKEC PDF

    CERAMIC PIN GRID ARRAY 120 pins

    Abstract: 74381 14 PIN CERAMIC DIP FAIRCHILD fairchild h11 TMC2246 TMC2246A TMC2301 TMC2302 pin diagram of 74381
    Text: www.fairchildsemi.com TMC2246A Image Filter 11 x 10 bit, 60 MHz Features Applications • • • • • • • • • • • • • 60 MHz computation rate 60 MHz data and coefficient input Four 11 x 10-bit multipliers Individual data and coefficient inputs


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    TMC2246A 10-bit 25-Bit 16-bit 120-pin TMC2246A DS30002246A CERAMIC PIN GRID ARRAY 120 pins 74381 14 PIN CERAMIC DIP FAIRCHILD fairchild h11 TMC2246 TMC2301 TMC2302 pin diagram of 74381 PDF

    74381

    Abstract: TMC2246 TMC2246A TMC2301 TMC2302 ceramic pin grid array package lead finish L6H11
    Text: www.cadeka.com TMC2246A Image Filter 11 x 10 bit, 60 MHz Features Applications • • • • • • • • • • • • • 60 MHz computation rate 60 MHz data and coefficient input Four 11 x 10-bit multipliers Individual data and coefficient inputs


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    TMC2246A 10-bit 25-Bit 16-bit 120-pin TMC2246A 2246AH5C2 TMC2246AH6C TMC2246AH6C1 TMC2246AH6C2 74381 TMC2246 TMC2301 TMC2302 ceramic pin grid array package lead finish L6H11 PDF