CERAMIC PIN GRID ARRAY 120 pins
Abstract: MATRA MHS pga 180 gu -SH-112D 144 PGA 160-Pin PGA 8f diode CERAMIC PIN GRID ARRAY 144 pins code matra
Text: Packages Ceramic Pin Grid Array PGA package outlines 68 pins PGA Code : 8M Date : 15–12–95 84 pins PGA Code : 8R MATRA MHS Date : 21–12–95 1 Packages 100 pins PGA Code : GT Date : 15–12–95 120 pins PGA Code : GU 2 Date : 10–02–95 MATRA MHS
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k 2134
Abstract: CPGA120 C-PGA-120 CPGA sot259 SOT259-2
Text: PDF: 2002 Nov 01 Philips Semiconductors Package outline SOT259-2 CPGA120: ceramic pin grid array package; 120 pins; body 33.5 x 33.5 x 2.6 mm D D1 pin 1 index mark location A2 E1 E A1 L detail X b e N e M L K J H G F index pin E D C B A 1 2 3 4 5 6 7 8 9 10 11 12 13
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OT259-2
CPGA120:
k 2134
CPGA120
C-PGA-120
CPGA
sot259
SOT259-2
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Untitled
Abstract: No abstract text available
Text: Package outline SOT259-2 CPGA120: ceramic pin grid array package; 120 pins; body 33.5 x 33.5 x 2.6 mm D D1 pin 1 index mark location A2 E1 E A1 L detail X b e N e M L K J H G F index pin E D C B A 1 2 3 4 5 6 7 8 9 10 11 12 13 X seating plane DIMENSIONS mm dimensions are derived from the original inch dimensions
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OT259-2
CPGA120:
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PGA144
Abstract: 144 PGA 144 pin pga 81F64842B Atmel DATE CODE PGA-120 PGA 84 PGA84 PGA120
Text: 68 pins PGA Ceramic Pin Grid Array PGA Package Outlines Code:8M Date: 15/12/95 Rev. B – 23/08/01 1 PGA 84 pins PGA Code 8R Date: 21/07/00 2 Rev. B – 23/08/01 100 pins PGA Code:GT Date: 14/06/00 3 PGA Rev. B – 23/08/01 PGA 120 pins PGA Code:GU Date: 25/06/99
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Untitled
Abstract: No abstract text available
Text: BGA Products Aries has tooled and patented two ball grid array contact pins. The BallLock contact was designed for production applications, and has been incorporated into both a standard and a zero insertion force socket. The BallNest™ contact pin was designed to provide a four-fingered “nest” for each ball termination of the device to be socketed.
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c3466
Abstract: C3461 C3467 b4 c346 diode c346 diode IC 7400 SERIES ALL DATA C346 CY7C346 CY7C346B c3468
Text: fax id: 6104 1CY 7C34 6B CY7C346 CY7C346B 128-Macrocell MAX EPLDs Features ture is 100% user configurable, allowing the devices to accommodate a variety of independent logic functions. • • • • 128 macrocells in 8 LABs 20 dedicated inputs, up to 64 bidirectional I/O pins
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CY7C346
CY7C346B
128-Macrocell
CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
CY7C346/CY7C346B
c3466
C3461
C3467
b4 c346 diode
c346 diode
IC 7400 SERIES ALL DATA
C346
CY7C346
CY7C346B
c3468
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VAC068A
Abstract: VIC068A B144
Text: VAC068A CYPRESS SEMICONDUCTOR Features • Optional companion part to VIC068A • Implements master/slave VMEbus in terface in conjunction with the VIC068A • Complete VMEbus and I/O DMA ca pability for a 32-bit CPU • Complete local and VMEbus memory
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VIC068A
32-bit
64-Kbyte
VIC068A1VAC06SA
VIC64/CY7C964
VAC068Aâ
145-Pin
VAC068A-GC
VAC068A
VIC068A
B144
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Untitled
Abstract: No abstract text available
Text: CY7C346 CY7C346B CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 20 dedicated inputs, 64 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C346
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CY7C346
CY7C346B
128-Macrocell
CY7C346/CY7C346B
of7400-series
20-pin
CY7C346/
CY7C346B
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VMEbus interface handbook
Abstract: transistors BC 543 Cypress VMEbus Interface Handbook diode 68A VAC068 VIC068A LA18 14 pin ld18 transistor BC 147 FCT245
Text: fax id: 5600 1V AC0 68A VAC068A VMEbus Address Controller Features — Supports unaligned transfers • Optional companion part to VIC068A • Implements master/slave VMEbus interface in conjunction with the VIC068A • Complete VMEbus and I/O DMA capability for a 32-bit
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VAC068A
VIC068A
32-bit
64-Kbyte
VMEbus interface handbook
transistors BC 543
Cypress VMEbus Interface Handbook
diode 68A
VAC068
VIC068A
LA18 14 pin
ld18
transistor BC 147
FCT245
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Untitled
Abstract: No abstract text available
Text: CY7C346 CY7C346B STCYPRESS 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs • 20 dedicated inputs, up to 64 bidirec tional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C346
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CY7C346
CY7C346B
128-Macrocell
CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
CY7C346/CY7C346B
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VMEbus Handbook
Abstract: VMEbus interface handbook FCT245 VAC068 VAC068A VIC068A VME ACFAIL LD3011 LA-10 LD31
Text: VAC068A VMEbus Address Controller — Supports unaligned transfers Features • Optional companion part to VIC068A • Implements master/slave VMEbus interface in conjunction with the VIC068A • Complete VMEbus and I/O DMA capability for a 32-bit CPU • Complete local and VMEbus memory map decoding
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VAC068A
VIC068A
32-bit
64-Kbyte
160-Lead
VMEbus Handbook
VMEbus interface handbook
FCT245
VAC068
VAC068A
VIC068A
VME ACFAIL
LD3011
LA-10
LD31
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Untitled
Abstract: No abstract text available
Text: www.cadeka.com TMC2246A Image Filter 11 x 10 bit, 60 MHz Features Applications • • • • • • • • • • • • • 60 MHz computation rate 60 MHz data and coefficient input Four 11 x 10-bit multipliers Individual data and coefficient inputs
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TMC2246A
10-bit
25-Bit
16-bit
120-pin
2246AH5C2
TMC2246AH6C
TMC2246AH6C1
TMC2246AH6C2
TMC2246AKEC
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CERAMIC PIN GRID ARRAY 120 pins
Abstract: 74381 14 PIN CERAMIC DIP FAIRCHILD fairchild h11 TMC2246 TMC2246A TMC2301 TMC2302 pin diagram of 74381
Text: www.fairchildsemi.com TMC2246A Image Filter 11 x 10 bit, 60 MHz Features Applications • • • • • • • • • • • • • 60 MHz computation rate 60 MHz data and coefficient input Four 11 x 10-bit multipliers Individual data and coefficient inputs
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TMC2246A
10-bit
25-Bit
16-bit
120-pin
TMC2246A
DS30002246A
CERAMIC PIN GRID ARRAY 120 pins
74381
14 PIN CERAMIC DIP FAIRCHILD
fairchild h11
TMC2246
TMC2301
TMC2302
pin diagram of 74381
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74381
Abstract: TMC2246 TMC2246A TMC2301 TMC2302 ceramic pin grid array package lead finish L6H11
Text: www.cadeka.com TMC2246A Image Filter 11 x 10 bit, 60 MHz Features Applications • • • • • • • • • • • • • 60 MHz computation rate 60 MHz data and coefficient input Four 11 x 10-bit multipliers Individual data and coefficient inputs
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TMC2246A
10-bit
25-Bit
16-bit
120-pin
TMC2246A
2246AH5C2
TMC2246AH6C
TMC2246AH6C1
TMC2246AH6C2
74381
TMC2246
TMC2301
TMC2302
ceramic pin grid array package lead finish
L6H11
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LE C346
Abstract: 5067B
Text: fax id: 6104 CY7C346 CY7C346B 128-Macrocell MAX EPLDs ture is 100% user configurable, allowing the devices to accom modate a variety of independent logic functions. Featu res • 128 macrocells in 8 LABs • 20 dedicated inputs, up to 64 bidirectional I/O pins
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CY7C346
CY7C346B
128-Macrocell
CY7C346)
65-micron
CY7C346B)
84-pin
100-pin
CY7C346/CY7C346B
LE C346
5067B
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VIC068A
Abstract: VAC068 VAC068A FCT245 106240 ld18 LD31 LBR 84 VMEbus interface handbook
Text: VAC068A VMEbus Address Controller Features — Supports unaligned transfers • Optional companion part to VIC068A • Implements master/slave VMEbus interface in conjunction with the VIC068A • Complete VMEbus and I/O DMA capability for a 32-bit CPU • Complete local and VMEbus memory map decoding
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VAC068A
VIC068A
32-bit
64-Kbyte
VAC068A
VIC068A
VAC068
FCT245
106240
ld18
LD31
LBR 84
VMEbus interface handbook
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PI011
Abstract: No abstract text available
Text: . VAC068A mmàà^SSSSSSSSrnfi * .ài*' /*? / c VMEbus Address Controller • Dual UART channels on board — Double-buffered on transmit, quint-buffered on receive — Baud rate programmable • Miscellaneous features — Pin grid array or quad flatpack
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VAC068A
VIC068AIVAC068A
PI011
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VME ACFAIL
Abstract: FCT245 VIC068A CERAMIC PIN GRID ARRAY 120 pins VIC068A user guide VAC068 VAC068A LD18 LA18 code LD31
Text: VAC068A VMEbus Address Controller D Features D D Dual UART channels on board Ċ DoubleĆbuffered on transmit, quintĆbuffered on receive Optional companion part to VIC068A Implements master/slave VMEbus interface in conjunction with the VIC068A Ċ Baud rate programmable
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VAC068A
VIC068A
32bit
VME ACFAIL
FCT245
VIC068A
CERAMIC PIN GRID ARRAY 120 pins
VIC068A user guide
VAC068
VAC068A
LD18
LA18 code
LD31
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ld18 st
Abstract: VME ACFAIL cypress VMEbus Interface handbook dio ld26
Text: fax id: 5600 VAC068A VMEbus Address Controller — Supports unaligned transfers Featu res • Optional companion part to VIC068A • Implements master/slave VMEbus interface in conjunc tion with the VIC068A • Complete VMEbus and I/O DMA capability for a 32-bit
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VAC068A
VIC068A
32-bit
64-Kbyte
ld18 st
VME ACFAIL
cypress VMEbus Interface handbook
dio ld26
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ceramic pin grid array package plating
Abstract: No abstract text available
Text: Standard Products RadHard Eclipse FPGA Family 6250 and 6325 Advanced Data Sheet May, 2005 www.aeroflex.com/RadHardFPGA FEATURES Comprehensive design tools include high quality Verilog/ VHDL synthesis and simulation QuickLogic IP available for microcontrollers, DRAM
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16-bit
MIL-STD-883
120MeV-cm2/mg
ceramic pin grid array package plating
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Untitled
Abstract: No abstract text available
Text: LSI LOCK L64210/L64211 Variable-Length Video Shift Registers The L64210 and L64211 are two high-speed Variable-Length Video Shift Registers. These devices can be used individually or as video line delays for the L64200 series filter proces sors. Description
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L64210/L64211
L64210
L64211
L64200
68-pin
L64210/164211
012Typ
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CY37032
Abstract: CY37032V CY37064 CY37064V CY37128 CY37128V CY37192 CY37256 CY37384 CY37512
Text: 1Ultra37000 Features Family Ultra37000: December 13, 1996 Revision: March 15, 2001 Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability
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1Ultra37000
Ultra37000:
Ultra37000TM
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37128V
CY37192
CY37256
CY37384
CY37512
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CY37064P44-154YMB
Abstract: CY37512P208-100UMB CY37256P160-125UMB CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37032VP44-100AI
Text: Family Ultra37000 CPLD Family[1] 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
CY37064P44-154YMB
CY37512P208-100UMB
CY37256P160-125UMB
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37128V
CY37032VP44-100AI
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CY37032
Abstract: CY37032V CY37064 CY37064V CY37128 CY37128V CY37192 CY37256 CY37384 CY37512
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes
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Ultra37000
CY37256P160-154AXC,
CY37256P160-125AXC,
CY37256P160-125AXI,
CY37256P160-83AXC,
CY37256P160-83AXI,
CY37032VP44-143AXC,
CY37032VP44-100AXC,
CY37032VP44-100AXI,
CY37032VP44-100JXI,
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37128V
CY37192
CY37256
CY37384
CY37512
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