AN1001
Abstract: application notes capacitor cross reference active and passive electronic components capacitance in BGA package capacitor package resistor resistor 220 ohm resistor 220 resistor cross reference
Text: Application Note AN1001 ClearONE RC BGA Configuration Options Introduction The double-sided construction of the CTS ceramic Ball Grid Array BGA package allows the PC board designer to closely locate passive resistor and capacitor elements near the active signal sources and
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AN1001
AN1001
application notes
capacitor cross reference
active and passive electronic components
capacitance in BGA package
capacitor package
resistor
resistor 220 ohm
resistor 220
resistor cross reference
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IPC-D-317A
Abstract: SN74V293 capacitance in BGA package SDMA002 IPC-D-317
Text: Application Report SDMA002 - June 2001 Design Considerations of SN74V293 FIFO in a MicroSTAR BGA Package Gary Khazan and Andy Pauley Standard Linear & Logic ABSTRACT Texas Instruments’ near-chip-scale MicroSTAR BGA package is gaining in popularity for
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SDMA002
SN74V293
IPC-D-317A
capacitance in BGA package
IPC-D-317
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C4 to BGA
Abstract: MX23L1612 MX23L1612XI-70 MX23L1612XI-70G MX23L1612XI-90 MX23L1612XI-90G PM0815
Text: MX23L1612 16M-BIT MASK ROM PIN DESCRIPTION FEATURES • Bit organization - 2M x 8 byte mode - 1M x 16 (word mode) • Fast access time - Random access:70ns(max.) • Current - Operating:25mA - Standby:5uA • Supply voltage - 2.7V ~ 3.6V • Package - 48 ball mini BGA (6mm x 8mm, ball pitch 0.8mm, ball
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MX23L1612
16M-BIT
D15/A-1
JUN/23/2003
C4 to BGA
MX23L1612
MX23L1612XI-70
MX23L1612XI-70G
MX23L1612XI-90
MX23L1612XI-90G
PM0815
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Untitled
Abstract: No abstract text available
Text: MX23L1612 16M-BIT MASK ROM PIN DESCRIPTION FEATURES • Bit organization - 2M x 8 byte mode - 1M x 16 (word mode) • Fast access time - Random access:70ns(max.) • Current - Operating:25mA - Standby:5uA • Supply voltage - 2.7V ~ 3.6V • Package - 48 ball mini BGA (6mm x 8mm, ball pitch 0.8mm, ball
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MX23L1612
16M-BIT
D15/A-1
JUL/10/2001
JUL/16/2001
OCT/03/2001
MAR/12/2002
MAY/20/2002
JUN/23/2003
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coreless substrate
Abstract: SDD11 coreless Coreless pcb transformer
Text: DesignCon 2008 Study of Fundamental Limit and Packaging Technology Solutions for 40-Gbps Transceiver Package Design Hong Shi, Altera Corporation [hshi@altera.com] Xiaohong Jiang, Altera Corporation John Xie, Altera Corporation CP-01038-1.0 February 2008 Abstract
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40-Gbps
CP-01038-1
10-Gbps
coreless substrate
SDD11
coreless
Coreless pcb transformer
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Untitled
Abstract: No abstract text available
Text: MX23L1613 16M-BIT MASK ROM FEATURES PIN DESCRIPTION • Bit organization - 2M x 8 byte mode - 1M x 16 (word mode) • Fast access time - Random access:70ns(max.) • Current - Operating:25mA - Standby:5uA • Supply voltage - 2.7V ~ 3.6V • Package - 48 pin TSOP(12mm x 20mm)
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MX23L1613
16M-BIT
D15/A-1
APR/27/2000
JAN/18/2001
JUN/28/2001
JUL/16/2001
OCT/02/2001
NOV/22/2002
PM0620
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Turn-Key
Abstract: Adapters Sockets Product Presentations Giga-snaP™ BGA SMT Adapters Receptacles Prototyping Adapters Surface Mount Package Emulation Probing and Analysis Adapters BGA Sockets
Text: RoHS ISO w i t h 900 d 08 20 i g n : 1 es Certified Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . 2 Catalog 26 Receptacles . . . . . . . . . . . . . . . . . . . . . 22 Package Conversion For Production Applications . . . . 24-25
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75GHz
50-80grams
Turn-Key
Adapters
Sockets
Product Presentations
Giga-snaP™ BGA SMT Adapters
Receptacles
Prototyping Adapters
Surface Mount Package Emulation
Probing and Analysis Adapters
BGA Sockets
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Untitled
Abstract: No abstract text available
Text: MX23L8103 8M-BIT MASK ROM FEATURES PIN DESCRIPTION • Bit organization - 1M x 8 byte mode - 512K x 16 (word mode) • Fast access time - Random access:70ns(max.) • Current - Operating:15mA - Standby:5uA • Supply voltage - 2.7V ~ 3.6V • Package - 48 pin TSOP(12mm x 20mm)
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MX23L8103
D15/A-1
MAY/31/2000
JUL/06/2001
JUL/16/2001
SEP/28/2001
SEP/10/2002
PM0622
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GS8662QT19BGD-250I
Abstract: GS8662QT07BD-200 Features GS8662QT07BD-333I GS8662QT07BGD-200I AN1021 variable speed drive block diagram
Text: GS8662QT07/10/19/37BD-357/333/300/250/200 72Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662QT07/10/19/37BD-357/333/300/250/200
165-Bump
165-bump,
GS8662QT37BGD-250I
GS8662QT37BGD-200I
GS8662QTxxBD-300T.
GS8662QT19BGD-250I
GS8662QT07BD-200
Features
GS8662QT07BD-333I
GS8662QT07BGD-200I
AN1021
variable speed drive block diagram
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GS8662D10BGD-400
Abstract: GS8662D10BGD-333 AN1021
Text: GS8662D07/10/19/37BD-450/400/350/333/300 72Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662D07/10/19/37BD-450/400/350/333/300
165-Bump
165-bump,
GS8662DxxD-300T.
AN1021
GS8662D10BGD-400
GS8662D10BGD-333
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GS8662Q07BD-200
Abstract: No abstract text available
Text: GS8662Q07/10/19/37BD-357/333/300/250/200 72Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662Q07/10/19/37BD-357/333/300/250/200
165-Bump
GS8662QxxBD-300T.
AN1021
GS8662Q07BD-200
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AN1021
Abstract: No abstract text available
Text: Preliminary GS8342D07/10/19/37BD-450/400/350/333/300 36Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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GS8342D07/10/19/37BD-450/400/350/333/300
165-Bump
165-bump,
GS8342D37BGD-300I
GS8342DxxD-300T.
AN1021
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Untitled
Abstract: No abstract text available
Text: GS8662DT07/10/19/37BD-450/400/350/333/300 72Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662DT07/10/19/37BD-450/400/350/333/300
165-Bump
GS8662DT37BGD-333I
GS8662DT37BGD-300I
GS8662DTxxD-300T.
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Untitled
Abstract: No abstract text available
Text: GS8662QT07/10/19/37BD-357/333/300/250/200 72Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662QT07/10/19/37BD-357/333/300/250/200
165-Bump
Bo300
GS8662QT37BGD-250I
GS8662QT37BGD-200I
GS8662QTxxBD-300T.
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GS8342DT10BGD-350I
Abstract: IR receiver TK 19 205
Text: GS8342DT07/10/19/37BD-450/400/350/333/300 36Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342DT07/10/19/37BD-450/400/350/333/300
165-Bump
165-bump,
GS8342DTxxBD-300T.
GS8342DT10BGD-350I
IR receiver TK 19 205
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Untitled
Abstract: No abstract text available
Text: Preliminary GS8342QT07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package
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GS8342QT07/10/19/37BD-357/333/300/250/200
165-Bump
165-bump,
GS8342QTxxBD-300T.
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Untitled
Abstract: No abstract text available
Text: GS8342QT07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342QT07/10/19/37BD-357/333/300/250/200
165-Bump
GS8342QT37BGD-200I
GS8342QTxxBD-300T.
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GS8342D19BGD-300
Abstract: GS8342D10BD-350I GS8342D19BD-350I 8342D07101937B
Text: GS8342D07/10/19/37BD-450/400/350/333/300 36Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342D07/10/19/37BD-450/400/350/333/300
165-Bump
165-bump,
GS8342DxxD-300T.
GS8342D19BGD-300
GS8342D10BD-350I
GS8342D19BD-350I
8342D07101937B
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Untitled
Abstract: No abstract text available
Text: GS8662D07/10/19/37BD-450/400/350/333/300 72Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662D07/10/19/37BD-450/400/350/333/300
165-Bump
GS8662DxxD-300T.
AN1021
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GS8662Q37BGD-333
Abstract: AN1021 GS8662Q19BD-333I GS8662Q07BD-200
Text: GS8662Q07/10/19/37BD-357/333/300/250/200 72Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662Q07/10/19/37BD-357/333/300/250/200
165-Bump
165-bump,
GS8662QxxBD-300T.
AN1021
GS8662Q37BGD-333
GS8662Q19BD-333I
GS8662Q07BD-200
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GS8662DT19BD-400
Abstract: No abstract text available
Text: GS8662DT07/10/19/37BD-450/400/350/333/300 72Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8662DT07/10/19/37BD-450/400/350/333/300
165-Bump
165-bump,
GS8662DTxxD-300T.
GS8662DT19BD-400
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Untitled
Abstract: No abstract text available
Text: GS8342DT07/10/19/37BD-450/400/350/333/300 36Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342DT07/10/19/37BD-450/400/350/333/300
165-Bump
GS8342DT37BGD-300I
GS8342DTxxBD-300T.
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Untitled
Abstract: No abstract text available
Text: GS8342D07/10/19/37BD-450/400/350/333/300 36Mb SigmaQuad-II+TM Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342D07/10/19/37BD-450/400/350/333/300
165-Bump
GD-300I
GS8342DxxD-300T.
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Untitled
Abstract: No abstract text available
Text: GS8342Q07/10/19/37BD-357/333/300/250/200 36Mb SigmaQuad-II+TM Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • 2.0 Clock Latency • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package • Dual Double Data Rate interface
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GS8342Q07/10/19/37BD-357/333/300/250/200
165-Bump
D-200I
GS8342QxxBD-300T.
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