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    CACHE RAM 64K X 8 Search Results

    CACHE RAM 64K X 8 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MD27C64-25 Rochester Electronics LLC 27C64 - 64K (8K x 8) EPROM Visit Rochester Electronics LLC Buy
    MC27C64-20/B Rochester Electronics LLC 27C64 - 64K (8K x 8) EPROM Visit Rochester Electronics LLC Buy
    MD27C64-15/B Rochester Electronics LLC 27C64 - 64K (8K x 8) EPROM Visit Rochester Electronics LLC Buy
    MD27C64-20/B Rochester Electronics LLC 27C64 - 64K (8K x 8) EPROM Visit Rochester Electronics LLC Buy
    MD27C64-20 Rochester Electronics LLC 27C64 - 64K (8K x 8) EPROM Visit Rochester Electronics LLC Buy

    CACHE RAM 64K X 8 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    pin diagram for quad core i7 processor

    Abstract: 1336-L6
    Text: •vvrMWW>>>>>>>>wwvi ,^ ? É ïr CY7C1336 ' CYPRESS 64K x 32 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states The CY7C1336 is a 3.3V 64K by 32 synchronous cache RAM


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    66-MHz 117-MHz 100-pin CY7C1336 CY7C1336 pin diagram for quad core i7 processor 1336-L6 PDF

    R2868

    Abstract: CY7C1031 CY7C1032 80486 microprocessor circuit diagram
    Text: CY7C1031 PRELIMINARY CY7C1032 64K x 18 Synchronous Cache RAM D Features t microĆ Fast clockĆtoĆoutput times D D D D Ċ 8.5 Functional Description processor cache systems with zero wait states 64K by 18 common I/O TwoĆbit wraparound counter supportĆ burst sequence 7C1031


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    CY7C1031 CY7C1032 7C1031) 7C1032) R2868 CY7C1031 CY7C1032 80486 microprocessor circuit diagram PDF

    CY7C1346

    Abstract: No abstract text available
    Text: fax id: 1112 PRELIMINARY CY7C1346 64K x 36 Synchronous-Pipelined Cache RAM Features Functional Description • Low 1.65 mW standby power (f=0, L version) The CY7C1346 is a 3.3V 64K by 36 synchronous-pipelined cache SRAM designed to support zero wait state secondary


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    CY7C1346 CY7C1346 100-MHz 166-MHz PDF

    intel 80486

    Abstract: CY7C1331 CY7C1332
    Text: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times


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    CY7C1331 CY7C1332 66-MHz 7C1331) 7C1332) 52-pin CY7C1331 CY7C1332 intel 80486 PDF

    9715

    Abstract: JESD22
    Text: Cypress Semiconductor Qualification Report QTP# 97153, VERSION 1.1 September, 1997 64K x 18 Synchronous Cache RAM CY7C1031/CY7C1032 Cypress Semiconductor 64K x 18 SRAM, R3 Technology, Fab 4 Devices:CY7C1031/CY7C1032 Package: PLCC QTP# 97153 V1.1 Page 2 of 8


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    CY7C1031/CY7C1032 CY7C1031/1032 52-pins f4621458 CY7C1031-JC 30C/60 9715 JESD22 PDF

    80486 microprocessor pin out diagram

    Abstract: CY7C1031 CY7C1032 80486 microprocessor circuit diagram 80486 microprocessor block diagram intel 80486 microprocessor pin diagram
    Text: CY7C1031 CY7C1032 64K x 18 Synchronous Cache RAM Features Functional Description The CY7C1031 and CY7C1032 are 64K by 18 synchronous cache RAMs designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 8.5 ns. A 2-bit on-chip counter captures the first


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    CY7C1031 CY7C1032 CY7C1031 CY7C1032 66-MHz CY7C1031/CY7C1032 80486 microprocessor pin out diagram 80486 microprocessor circuit diagram 80486 microprocessor block diagram intel 80486 microprocessor pin diagram PDF

    64KX32

    Abstract: 7C13 CY7C1329
    Text: fax id: 1080 1CY 7C13 29 CY7C1329 PRELIMINARY 64K x 32 Synchronous-Pipelined Cache RAM Features Functional Description • Low 1.65 mW standby power (f=0, L version) The CY7C1329 is 3.3V 64K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary


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    CY7C1329 CY7C1329 100-MHz 64KX32 7C13 PDF

    80486 microprocessor block diagram and pin diagram

    Abstract: 64KX32 CY7C1336
    Text: 36 PRELIMINARY CY7C1336 64K x 32 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states • 64K by 32 common I/O • Low Standby Power 1.65 mW, L version • Fast clock-to-output times


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    CY7C1336 66-MHz 117-MHz 100-pin CY7C1336 80486 microprocessor block diagram and pin diagram 64KX32 PDF

    64KX32

    Abstract: CY7C1336
    Text: 336 PRELIMINARY CY7C1336 64K x 32 Synchronous Flow-Through 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states • 64K by 32 common I/O • Low Standby Power 1.65 mW, L version • Fast clock-to-output times


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    CY7C1336 66-MHz 117-MHz 100-pin CY7C1336 64KX32 PDF

    80486 microprocessor block diagram and pin diagram

    Abstract: 64KX32 CY7C1336
    Text: fax id: 1092 PRELIMINARY CY7C1336 64K x 32 Synchronous 3.3V Cache RAM Features Functional Description • Supports 66-MHz microprocessor cache systems with zero wait states • 64K by 32 common I/O • Low Standby Power 1.65 mW, L version • Fast clock-to-output times


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    CY7C1336 66-MHz 100-pin CY7C1336 80486 microprocessor block diagram and pin diagram 64KX32 PDF

    80486 microprocessor pin out diagram

    Abstract: 80486 microprocessor block diagram and pin diagram company wl CY7C1031 CY7C1032
    Text: CY7C1031 CY7C1032 64K x 18 Synchronous Cache RAM Features Functional Description The CY7C1031 and CY7C1032 are 64K by 18 synchronous cache RAMs designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 8.5 ns. A 2-bit on-chip counter captures the first


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    CY7C1031 CY7C1032 CY7C1031 CY7C1032 66-MHz CY7C1031/CY7C1032 80486 microprocessor pin out diagram 80486 microprocessor block diagram and pin diagram company wl PDF

    80486 microprocessor block diagram and pin diagrams

    Abstract: EQUIVALENT cd 1031 cs cd 1031 80486 microprocessor block diagram and pin diagram 80486 microprocessor pin out diagram block diagram of processor 80486 EQUIVALENT cd 1031 80486 microprocessor description 80486 microprocessor features 80486* diagram circuits
    Text: CY7C1031 CY7C1032 64K x 18 Synchronous Cache RAM Features Functional Description • Supports 66-MHz Pentium microprocessor cache systems with zero wait states • 64K by 18 common I/O • Fast clock-to-output times — 8.5 ns • Two-bit wraparound counter supporting Pentium microprocessor and 486 burst sequence 7C1031


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    CY7C1031 CY7C1032 66-MHz 7C1031) 7C1032) 52-pin CY7C1031 CY7C1032 80486 microprocessor block diagram and pin diagrams EQUIVALENT cd 1031 cs cd 1031 80486 microprocessor block diagram and pin diagram 80486 microprocessor pin out diagram block diagram of processor 80486 EQUIVALENT cd 1031 80486 microprocessor description 80486 microprocessor features 80486* diagram circuits PDF

    51 TAG

    Abstract: f AX 1331 intel 80486 7C13 CY7C1331 CY7C1332
    Text: 1CY 7C13 32 CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3V RAM Features Functional Description • Supports 66-MHz Pentium processor cache systems with zero wait states • Single 3.3V power supply • 64K by 18 common I/O • Fast clock-to-output times


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    CY7C1331 CY7C1332 66-MHz 7C1331) 7C1332) 52-pin CY7C1331 CY7C1332 51 TAG f AX 1331 intel 80486 7C13 PDF

    80486 microprocessor pin out diagram

    Abstract: ZL112 80486 microprocessor block diagram and pin diagram CY7C1031 CY7C1032 80486 microprocessor circuit diagram block diagram of processor 80486 wd153 intel 80486 pin diagram i486 sx
    Text: CY7C1031 CY7C1032 CYPRESS 64K x 18 Synchronous Cache RAM Functional Description Features • Supports 66-MHz Pentium microprocessor cache sys­ tems with zero wait states • 64K by 18 common I/O • Fast clock-to-output times — 8.5 ns • Two-bit wraparound counter supporting Pentium mi­


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    66-MHz 7C1031) 7C1032) 52-pin CY7C1031 CY7C1032 CY7C1031 CY7C1032 80486 microprocessor pin out diagram ZL112 80486 microprocessor block diagram and pin diagram 80486 microprocessor circuit diagram block diagram of processor 80486 wd153 intel 80486 pin diagram i486 sx PDF

    MCM69T618

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 64K x 18 Bit Synchronous Pipelined Cache Tag RAM The MCM69T618 is a 1M–bit synchronous fast static RAM with integrated tag compare function. It is designed to address tag RAM for 512KB, 1MB, or 2MB secondary cache as well as to be used as a data RAM for 512KB caches. This


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    MCM69T618 512KB, 512KB MCM69T618 MCM69T618/D PDF

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 64K x 18 Bit Synchronous Pipelined Cache Tag RAM The MCM69T618 is a 1M bit synchronous fast static RAM with integrated tag compare function. It is designed to address tag RAM for 512KB, 1MB, or 2MB secondary cache as well as to be used as a data RAM for 512KB caches. This


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    MCM69T618/D MCM69T618 512KB, 512KB 69T618/D PDF

    80486 microprocessor block diagram and pin diagrams

    Abstract: 80486 microprocessor block diagram and pin diagram r2868 EQUIVALENT cd 1031 intel 80486 CY7C1031 CY7C1032 80486 microprocessor 80486 microprocessor pin out diagram
    Text: 1CY 7C10 32 CY7C1031 CY7C1032 PRELIMINARY 64K x 18 Synchronous Cache RAM Features Functional Description • Supports 66-MHz Pentium microprocessor cache systems with zero wait states • 64K by 18 common I/O • Fast clock-to-output times — 8.5 ns • Two-bit wraparound counter supporting Pentium microprocessor and 486 burst sequence 7C1031


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    CY7C1031 CY7C1032 66-MHz 7C1031) 7C1032) 52-pin CY7C1031 CY7C1032 64Kor 80486 microprocessor block diagram and pin diagrams 80486 microprocessor block diagram and pin diagram r2868 EQUIVALENT cd 1031 intel 80486 80486 microprocessor 80486 microprocessor pin out diagram PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CYPRESS 64K x 18 Synchronous Cache RAM F eatu res • Direct interface with the processor and external cache controller • Supports 66'MHz Pentium 'Mmicro­ processor cache systems with zero wait states • Asynchronous output enable • 1/Os capable of 3.3V operation


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    CY7C1031) CY7C1032) CY7C1031 CY7C1032 1032-7IC 1032-7N 52-Lead PDF

    EQUIVALENT cd 1031 cs

    Abstract: 7C1031
    Text: CY7C1031 CY7C1032 PRELIM INARY 64K x 18 Synchronous Cache RAM • Direct interface with the processor and external cache controller • Asynchronous output enable • VOs capable of 33V operation • JEDEC-standard pinout • 52-pin PLCC and PQFP packaging


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    CY7C1031 CY7C1032 66-MHz 7C1031) 7C1032) 52-pin EQUIVALENT cd 1031 cs 7C1031 PDF

    Untitled

    Abstract: No abstract text available
    Text: fax id: 1092 - » * h h h h h h h h h h h & *j ; . CY7C1336 PRELIMINARY L lF C I I j O O : 64K x 32 Synchronous 3.3V Cache RAM Features Functional Description • Supports 66-MHz m icroprocessor cache system s with zero wait states • 64K by 32 common I/O


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    CY7C1336 100-pin CY7C1336 PDF

    MCM69P618C

    Abstract: MCM69P618CTQ4 MCM69P618CTQ4R MCM69P618CTQ5 MCM69P618CTQ5R MCM69P618CTQ6 MCM69P618CTQ6R MCM69P618CTQ7 MCM69P618CTQ7R
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 64K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM69P618C is a 1M–bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the 68K Family, PowerPC, 486, i960, and Pentium microprocessors. It is organized as 64K


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    MCM69P618C i960TM, MCM69P618C MCM69P618C/D MCM69P618CTQ4 MCM69P618CTQ4R MCM69P618CTQ5 MCM69P618CTQ5R MCM69P618CTQ6 MCM69P618CTQ6R MCM69P618CTQ7 MCM69P618CTQ7R PDF

    Untitled

    Abstract: No abstract text available
    Text: Revision: Monday, January 18, 1993 2 5 0 ^ 2 CYPRESS SEMI CONDUCTOR oooinzi 57E Features •• 64K x 18 Synchronous Cache 3.3V RAM • Synchronous self-timed write • Direct interface with the processor and external cache controller • Asynchronous output enable


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    CY7C1331 CY7C1332 50-MHz 14-ns 85-pF 7C1331) 7C1332) 52-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE U II^ C a n iM ni — 1 MT3LST3264 P , MT5LST6464(P) 32K, 64K x 64 SYNCHRONOUS SRAM MODULE 32K, 64K x 64 SRAM with TAG RAM 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN ASSIGNMENT (Front View)


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    MT3LST3264 MT5LST6464 160-lead, 82430FX 256KB/512KB, 160-PIN PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1331 CY7C1332 ADVANCED INFORMATION 64K x 18 Synchronous Cache 3.3 V RAM Direct interface with the processor and external cache controller Asynchronous output enable JEDEC-standard pinout 52-pin PLCC and PQFP packaging Features • Supports 66-MHz Pentium proces­


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    CY7C1331 CY7C1332 66-MHz 7C1331) 7C1332) 52-pin PDF