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    BUTTERFLY DSP Search Results

    BUTTERFLY DSP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMPM3HNFDBFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM4KLF10AFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP64-1414-0.80-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HPF10BDFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP128-1420-0.50-001 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM4KLFDAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP64-1414-0.80-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM3HNF10BFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M3 Core Based Microcontroller/32bit/P-LQFP100-1414-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation

    BUTTERFLY DSP Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Microcontroller Handbook

    Abstract: ARM7 pin configuration ARM7 microcontroller pin configuration embedded datasheet ARM7 TIC 8213 MR 4710 ARM6 ARM7 ppi to rs232 arm7 architecture ARM7 microcontroller
    Text: Butterfly Microcontroller Handbook HB4100-2.0 For performance characteristics, refer to the Butterfly Microcontroller Performance Supplement: Publication no. SP4578 for Commercial grade specification or SP4708 (for Industrial grade specification) . Mitel Corporation 1998 Publication No.HB4100-2.0 Issue No.2.0 Rev.C March 1998


    Original     		HB4100-2 SP4578 SP4708 Microcontroller Handbook ARM7 pin configuration ARM7 microcontroller pin configuration embedded datasheet ARM7 TIC 8213 MR 4710 ARM6 ARM7 ppi to rs232 arm7 architecture ARM7 microcontroller PDF

    Untitled

    Abstract: No abstract text available
    Text: Butterfly Microcontroller Handbook HB4100-2.0 For performance characteristics, refer to the Butterfly Microcontroller Performance Supplement: Publication no. SP4578 for Commercial grade specification or SP4708 (for Industrial grade specification) Mitel Corporation 1998 Publication No.HB4100-2.0 Issue No.2.0 Rev.C March 1998


    OCR Scan     		HB4100-2 SP4578 SP4708 PDF

    BUTTERFLY DSP

    Abstract: eva complex AN1381 ST100 ST120 64 point FFT radix-4 radix-4 asm chart RES02 T02I
    Text: AN1381 APPLICATION NOTE Implementing the Radix-4 FFT Algorithm Using the ST120 DSP By Marianne DELPHIN INTRODUCTION This application note for the ’Radix-4’ implementation of the Fast Fourier Transform algorithm on the ST120 DSP shows how this algorithm well exploits the high parallelism of the ’ST100’ superscalar


    Original     		AN1381 ST120 ST100' AN1381 BUTTERFLY DSP eva complex ST100 64 point FFT radix-4 radix-4 asm chart RES02 T02I PDF

    radix-2 dit fft flow chart

    Abstract: SPRA027 TMS320C40 TMS320 Family theory TMS320C4X FLOATING POINT PROCESSOR block diagram TMS320C30 W164 XDS510 SPRA108 TI AR7
    Text: Parallel 1-D FFT Implementation With TMS320C4x DSPs Application Report Rose Marie Piedra Digital Signal Processing — Semiconductor Group SPRA108 February 1994 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any


    Original     		TMS320C4x SPRA108 radix-2 dit fft flow chart SPRA027 TMS320C40 TMS320 Family theory TMS320C4X FLOATING POINT PROCESSOR block diagram TMS320C30 W164 XDS510 SPRA108 TI AR7 PDF

    assembly language programs for fft algorithm

    Abstract: radix-2 dit fft flow chart vs bi 187 d 145 Architecture of TMS320C4X FLOATING POINT PROCESSOR radix-4 DIT FFT C code DELTA 713 fft algorithm ppds TMS320C40 TMS320C30 TMS320C40
    Text: Parallel 1-D FFT Implementation With TMS320C4x DSPs Application Report Rose Marie Piedra Digital Signal Processing — Semiconductor Group SPRA108 February 1994 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any


    Original     		TMS320C4x SPRA108 assembly language programs for fft algorithm radix-2 dit fft flow chart vs bi 187 d 145 Architecture of TMS320C4X FLOATING POINT PROCESSOR radix-4 DIT FFT C code DELTA 713 fft algorithm ppds TMS320C40 TMS320C30 TMS320C40 PDF

    radix-2 fft xilinx

    Abstract: BUTTERFLY DSP 64 point radix 4 FFT 8 point fft 8 point fft xilinx Butterfly Distributed arithmetic data path blocks for Radix - 2 butterfly 16 point FFT butterfly 8-point xilinx FFT radix-2
    Text: The Fastest FFT in the West The incorporation of a large FFT [1] in a single FPGA, while noteworthy, may evoke a “so what” response. Again its speed will be compared to the more standard single chip DSP design. We propose to compare Xilinx FPGA performance with an exhaustive list of DSP devices. The test benchmark fig. 1 ,


    Original     		320nsecs) radix-2 fft xilinx BUTTERFLY DSP 64 point radix 4 FFT 8 point fft 8 point fft xilinx Butterfly Distributed arithmetic data path blocks for Radix - 2 butterfly 16 point FFT butterfly 8-point xilinx FFT radix-2 PDF

    dsp24s

    Abstract: radix-8 FFT radix1024 CI23 yswa DSP24 DR01 A28AD br09 BR17
    Text: DSP Architectures Transform Your World DSP24 TM High Performance Scalable DSP Chip DSP Architectures Data Sheet Real 24 PORT A Imag 24 DSP24 Imag 24 24 24 X INPU TB US Y INPUT BU S O U TP U TB US 24 48 Imag 24 Scheduler/ Controller X Y Memory A 24 Memory B


    Original     		DSP24 432-lead DSP24-Y-100-C DSPA-DSP24DS dsp24s radix-8 FFT radix1024 CI23 yswa DSP24 DR01 A28AD br09 BR17 PDF

    radix-8 FFT

    Abstract: yswa BR17 CI23 radix DSP24 24PORTB DR17 64 point radix 4 FFT dsp24s
    Text: DSP Architectures Transform Your World DSP24 TM High Performance Scalable DSP Chip DSP Architectures Data Sheet Real 24 PORT A Imag 24 DSP24 Imag 24 24 24 X I NP U TB US Y INPUT BU S OUTPU TB US 24 48 Imag 24 Scheduler/ Controller X Y Memory A 24 Memory B


    Original     		DSP24 432-lead DSP24-Y-100-C DSPA-DSP24DS radix-8 FFT yswa BR17 CI23 radix DSP24 24PORTB DR17 64 point radix 4 FFT dsp24s PDF

    honeywell hx3000

    Abstract: radix-8 FFT ER22 hx3000 DBGA CI23 radix16 fft RHDSP24 Digital Signal Processing Architectures Radix-32
    Text: DSP Architectures Transform Your World RHDSP24 TM Radiation Hardened Scalable DSP Chip PRELIMINARY Data Sheet Real 24 PORT A Imag 24 RHDSP24 Imag 24 24 24 X I NP U TB US Y INPUT BU S OUTPU TB US 24 48 Imag 24 Scheduler/ Controller X Y Memory A 24 Memory B


    Original     		RHDSP24 DSPA-RHDSP24DS honeywell hx3000 radix-8 FFT ER22 hx3000 DBGA CI23 radix16 fft RHDSP24 Digital Signal Processing Architectures Radix-32 PDF

    IDT7050

    Abstract: AN-42 IDT6116 IDT7052 IDT7210 IDT7381 BUTTERFLY DSP
    Text: USING THE IDT7050/7052 FOURPORT SRAMs IN DSP AND MATRIX PROCESSING APPLICATIONS APPLICATION NOTE AN-42 Integrated Device Technology, Inc. By Tao Lin, Julie Lin, and Yupling Chung INTRODUCTION C Most digital signal processing DSP algorithms have inherent parallelism and may be pipelined. Usually, these


    Original     		IDT7050/7052 AN-42 IDT7050 IDT7052 IDT7052 AN-23. AN-35. IDT7050 AN-42 IDT6116 IDT7210 IDT7381 BUTTERFLY DSP PDF

    spra012a

    Abstract: C5000 TMS320 TMS32020 variable length fft processor TMS320 Family volume 1 Butterfly TMS320C54X IFFT SPRA554A 54xdsplib
    Text: Application Report SPRA554A Implementation of the Double-Precision Complex FFT for the TMS320C54x DSP Mike Hannah Aaron Kofi Aboagye TI MSDS Emerging Markets and Technologies Group TI C5000 DSP Software Applications Group Abstract A double-precision complex fast Fourier transform FFT C-callable code library has been


    Original     		SPRA554A TMS320C54x C5000 32-bit spra012a TMS320 TMS32020 variable length fft processor TMS320 Family volume 1 Butterfly TMS320C54X IFFT SPRA554A 54xdsplib PDF

    SPRA012

    Abstract: IFFT TMS320C54X IFFT C54x spra554 processor ifft BUTTERFLY DSP radix-2 C5000 TMS320
    Text: Application Report SPRA554B Implementation of the Double-Precision Complex FFT for the TMS320C54x DSP Mike Hannah Aaron Kofi Aboagye TI MSDS Emerging Markets and Technologies Group TI C5000 DSP Software Applications Group Abstract A double-precision complex Fast Fourier Transform FFT C-callable code library has been


    Original     		SPRA554B TMS320C54x C5000 32-bit SPRA012 IFFT TMS320C54X IFFT C54x spra554 processor ifft BUTTERFLY DSP radix-2 TMS320 PDF

    radix-8 FFT

    Abstract: DBGA KD 472 M mov CMAC A15B2 sc sf 12A H4 17ER CI23 honeywell hx3000 HX3000
    Text: DSP Architectures RHDSP24 Radiation Hardened Scalable DSP Chip Transform Your WorldTM Data Sheet Real 24 PORT A Imag 24 RHDSP24 Imag 24 24 24 X INPU TB US Y INPUT BU S O U TP U TB US 24 48 Imag 24 Scheduler/ Controller X Y Memory A 24 Memory B 24 System Controls


    Original     		RHDSP24 RHDSP24-Y-75-M DSPA-RHDSP24DS radix-8 FFT DBGA KD 472 M mov CMAC A15B2 sc sf 12A H4 17ER CI23 honeywell hx3000 HX3000 PDF

    16 point DIF FFT using radix 4 fft

    Abstract: fft algorithm cosin 64 point FFT radix-4 BUTTERFLY DSP spra152 16 point DIF FFT using radix 2 fft TMS320C80 radix-4 ALU flow chart
    Text: Implementing the Radix-4 Decimation in Frequency DIF Fast Fourier Transform (FFT) Algorithm Using a TMS320C80 DSP APPLICATION REPORT: SPRA152 Author: Charles Wu SC Sales & Marketing – TI Taiwan Digital Signal Processing Solutions January 1998 IMPORTANT NOTICE


    Original     		TMS320C80 SPRA152 16 point DIF FFT using radix 4 fft fft algorithm cosin 64 point FFT radix-4 BUTTERFLY DSP spra152 16 point DIF FFT using radix 2 fft radix-4 ALU flow chart PDF

    DECIMATION IN FREQUENCY DSP

    Abstract: BUTTERFLY DSP fft algorithm SRAM 6116 two butterflies AN-42 IDT6116 IDT7052 IDT7054 IDT7210
    Text: USING THE IDT7052/7054 FOURPORT SRAMs IN DSP AND MATRIX PROCESSING APPLICATIONS APPLICATION NOTE AN-42 By Tao Lin, Julie Lin, and Yupling Chung Introduction C Most digital signal processing DSP algorithms have inherent parallelism and may be pipelined. Usually, these algorithms are computation intensive. In real-time applications, multiprocessor or parallel distributed processor systems are commonly used to implement these


    Original     		IDT7052/7054 AN-42 IDT7052 IDT7054 AN-23. AN-35. DECIMATION IN FREQUENCY DSP BUTTERFLY DSP fft algorithm SRAM 6116 two butterflies AN-42 IDT6116 IDT7052 IDT7054 IDT7210 PDF

    BUTTERFLY DSP

    Abstract: AN-42 IDT6116 IDT7052 IDT7054 IDT7210 IDT7381 fft algorithm
    Text: USING THE IDT7052/7054 FOURPORT SRAMs IN DSP AND MATRIX PROCESSING APPLICATIONS APPLICATION NOTE AN-42 By Tao Lin, Julie Lin, and Yupling Chung Introduction C Most digital signal processing DSP algorithms have inherent parallelism and may be pipelined. Usually, these algorithms are computation intensive. In real-time applications, multiprocessor or parallel distributed processor systems are commonly used to implement these


    Original     		IDT7052/7054 AN-42 IDT7052 IDT7054 AN-23. AN-35. BUTTERFLY DSP AN-42 IDT6116 IDT7052 IDT7054 IDT7210 IDT7381 fft algorithm PDF

    IDT6116

    Abstract: BUTTERFLY DSP fft algorithm AN-42 IDT7052 IDT7054 IDT7210 IDT7381 system generator fft SRAM 4KX8
    Text: USING THE IDT7052/7054 FOURPORT SRAMs IN DSP AND MATRIX PROCESSING APPLICATIONS APPLICATION NOTE AN-42 Integrated Device Technology, Inc. By Tao Lin, Julie Lin, and Yupling Chung INTRODUCTION Most digital signal processing DSP algorithms have inherent parallelism and may be pipelined. Usually, these


    Original     		IDT7052/7054 AN-42 IDT7052 IDT7054 IDT7052 AN-23. AN-35. IDT6116 BUTTERFLY DSP fft algorithm AN-42 IDT7054 IDT7210 IDT7381 system generator fft SRAM 4KX8 PDF

    16 point DIF FFT using radix 4 fft

    Abstract: 16 point DIF FFT using radix 2 fft fft algorithm ADSP21XX FFT CALCULATION radix-2 adsp 21xx fft calculation fft audio processing n point dit fft 16 point DFT butterfly graph assembly language programs for fft algorithm
    Text: Engineer To Engineer Note EE-18 Notes on using Analog Devices’ DSP, audio, & video components from the Computer Products Division Phone: 800 ANALOG-D or (781) 461-3881, FAX: (781) 461-3010, EMAIL: dsp.support@analog.com Choosing and Using FFTs for ADSP21xx


    Original     		EE-18 ADSP21xx ADSP21xx. ADSP-21xx 16 point DIF FFT using radix 4 fft 16 point DIF FFT using radix 2 fft fft algorithm ADSP21XX FFT CALCULATION radix-2 adsp 21xx fft calculation fft audio processing n point dit fft 16 point DFT butterfly graph assembly language programs for fft algorithm PDF

    ADSP-TS201

    Abstract: EE-218 ADSP-TS101 ADSP-TS101 application TigerSHARC
    Text: Engineer-to-Engineer Note a EE-218 Technical notes on using Analog Devices DSPs, processors and development tools Contact our technical support at dsp.support@analog.com and at dsptools.support@analog.com Or visit our on-line resources http://www.analog.com/ee-notes and http://www.analog.com/processors


    Original     		EE-218 ADSP-TS201 EE-218) FFT32 EE-218 ADSP-TS101 ADSP-TS101 application TigerSHARC PDF

    Untitled

    Abstract: No abstract text available
    Text: APRIL 1989 Ä PLESSEY W S em ico n d u cto rs. P D S P 16116 16 BY 16 BIT COMPLEX MULTIPLIER SUPERSEDES EDITION IN JULY 1988 DSP 1C HANDBOOK The PDSP16116 will multiply two complex (16+16) bit words every 100ns and can be configured to output the complete complex (32+32) bit result within a single cycle. The


    OCR Scan     		PDSP16116 100ns 16x16 PDSP16318, 10MHz PS2187 PDF

    branch metric

    Abstract: Viterbi Trellis Decoder texas TMS320C54x, instruction set SPRA672 MET opts C5000 viterbi algorithm
    Text: Application Report SPRA672 - June 2000 Application-Specific Examples for the TMS320C54x DSP C5000 Applications Team Digital Signal Processing Solutions ABSTRACT This application report shows examples of typical applications for the TMS320C54x DSP. Since this DSP is widely used for speech coding and telecommunications, the applications


    Original     		SPRA672 TMS320C54x C5000 TMS320C54xTM branch metric Viterbi Trellis Decoder texas TMS320C54x, instruction set MET opts viterbi algorithm PDF

    IIR32

    Abstract: Frac32 FIR32 FRAC16 MCF5249 MCF5282 INVERSE FAST FOURIER TRANSFORM Fir16
    Text: Digital Signal Processing Libraries Using the ColdFire eMAC and MAC User’s Manual ColdFire® Processors DSPLIBUM Rev. 1.2 03/2006 freescale.com Digital Signal Processing Libraries Using the ColdFire® eMAC and MAC User’s Manual by: Oleksandr Marchenko


    Original     		PDF

    radix 2 FFT source code for ts201

    Abstract: ADSP-TS201 TS201 R26S ADSP-TS201 datasheet ts101 dsp application note 512 j122 FR29 YR13 EE-218
    Text: Engineer-to-Engineer Note a EE-218 Technical notes on using Analog Devices DSPs, processors and development tools Contact our technical support at dsp.support@analog.com and at dsptools.support@analog.com Or visit our on-line resources http://www.analog.com/ee-notes and http://www.analog.com/processors


    Original     		EE-218 ADSP-TS201 EE-218) FFT32 radix 2 FFT source code for ts201 TS201 R26S ADSP-TS201 datasheet ts101 dsp application note 512 j122 FR29 YR13 EE-218 PDF

    branch metric

    Abstract: Viterbi Decoder viterbi algorithm branch metric report trellis 5/6 decoder Viterbi Trellis Decoder texas DSP56300 DSP56600 IS-136 Convolutional decoder
    Text: Implementing Viterbi Decoders Using the VSL Instruction on DSP Families DSP56300 and DSP56600 by Dana Taipale This application report describes how to generate, from a set of convolutional code polynomials, the assembly code needed for implementation of a Viterbi decoder.


    Original     		DSP56300 DSP56600 APR40/D branch metric Viterbi Decoder viterbi algorithm branch metric report trellis 5/6 decoder Viterbi Trellis Decoder texas DSP56600 IS-136 Convolutional decoder PDF