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    BSH 13 - N1 Search Results

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    03F8

    Abstract: MC33784 A3 DIODE
    Text: Freescale Semiconductor Advance Information Document Number: MC33784 Rev 2.0, 7/2008 DSI 2.02 Sensor Interface 33784 The 33784 is a slave, Distributed System Interface Bus DBUS , version 2.02 compatible device, optimized as a sensor interface. The device contains circuits to power sensors such as accelerometers,


    Original     		PDF MC33784 10-bit 03F8 MC33784 A3 DIODE

    Untitled

    Abstract: No abstract text available
    Text: Freescale Semiconductor Advance Information Document Number: MC33784 Rev 3.0, 11/2009 DSI 2.02 Sensor Interface 33784 The 33784 is a slave, Distributed System Interface Bus DBUS , version 2.02 compatible device, optimized as a sensor interface. The device contains circuits to power sensors such as accelerometers,


    Original     		PDF MC33784 10-bit

    Introduction to accelerometers

    Abstract: 03F8 MC33784 bsh 13 - n1
    Text: Freescale Semiconductor Advance Information Document Number: MC33784 Rev 3.0, 11/2009 DSI 2.02 Sensor Interface 33784 The 33784 is a slave, Distributed System Interface Bus DBUS , version 2.02 compatible device, optimized as a sensor interface. The device contains circuits to power sensors such as accelerometers,


    Original     		PDF MC33784 10-bit Introduction to accelerometers 03F8 MC33784 bsh 13 - n1

    bluetooth advantages and disadvantages

    Abstract: japanese transistor manual substitution verilog code for speech recognition japanese transistor substitution 29LV160 29lv200 transister 117 29lv400 apex20k400 K52 Package
    Text: PF1084-05 S1C33 Family Data Sheets • S1C33 Family • S1C33000 Core • S1C33209 • S1C33T01 • S1C33L01 • S1C33S01 • S1C33221/222 • S1C33240 • S1C33210 • S1C33205/225/226/245 • S1C33L03 • S1C33 Family Development Environment • S1C33 Family Middleware and Firmware


    Original     		PDF PF1084-05 S1C33 S1C33000 S1C33209 S1C33T01 S1C33L01 S1C33S01 S1C33221/222 S1C33240 bluetooth advantages and disadvantages japanese transistor manual substitution verilog code for speech recognition japanese transistor substitution 29LV160 29lv200 transister 117 29lv400 apex20k400 K52 Package

    Hitachi DSA00776

    Abstract: HM5216165 HM5216165TT HM5216165TT-10 HM5216165TT-12 HM5216165TT-15
    Text: HM5216165 Series 524,288-word x 16-bit × 2-bank Synchronous Dynamic RAM ADE-203-280 A (Z) Preliminary Rev. 0.1 Oct. 20, 1995 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.


    Original     		PDF HM5216165 288-word 16-bit ADE-203-280 Hz/83 Hz/66 HM5216165TT TTP-50D) Hitachi DSA00776 HM5216165TT-10 HM5216165TT-12 HM5216165TT-15

    HM5216165

    Abstract: HM5216165TT HM5216165TT-10H HM5216165TT-12 HM5216165-10H Hitachi DSA00196
    Text: HM5216165 Series 524,288-word x 16-bit × 2-bank Synchronous Dynamic RAM ADE-203-280B Z Rev. 2.0 Jun. 20, 1997 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.


    Original     		PDF HM5216165 288-word 16-bit ADE-203-280B Hz/83 HM5216165-10H HM5216165-10H) HM5216165-10/15 HM5216165TT HM5216165TT-10H HM5216165TT-12 Hitachi DSA00196

    HM5216165TT-10H

    Abstract: HM5216165TT-12 HM5216165TT-15 HM5216165 HM5216165TT HM5216165TT-10 Hitachi DSA0015
    Text: HM5216165 Series 524,288-word x 16-bit × 2-bank Synchronous Dynamic RAM ADE-203-280A Z Rev. 1.0 Dec. 20, 1996 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.


    Original     		PDF HM5216165 288-word 16-bit ADE-203-280A Hz/83 Hz/66 HM5216165-10H HM5216165-10H) HM5216165TT-10H HM5216165TT-12 HM5216165TT-15 HM5216165TT HM5216165TT-10 Hitachi DSA0015

    HM5216165

    Abstract: HM5216165TT HM5216165TT-10H HM5216165TT-12
    Text: HM5216165 Series EO 16 M LVTTL Interface SDRAM 512-kword x 16-bit × 2-bank 100 MHz/83 MHz L E0167H10 (Ver. 1.0) (Previous ADE-203-280C (Z) Jun. 12, 2001 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2


    Original     		PDF HM5216165 512-kword 16-bit Hz/83 E0167H10 ADE-203-280C HM5216165TT HM5216165TT-10H HM5216165TT-12

    Hitachi DSA00164

    Abstract: No abstract text available
    Text: HM5216165 Series 16 M LVTTL Interface SDRAM 512-kword x 16-bit × 2-bank 100 MHz/83 MHz ADE-203-280C (Z) Rev. 3.0 Nov. 1997 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.


    Original     		PDF HM5216165 512-kword 16-bit Hz/83 ADE-203-280C HM5216165-10H) HM5216165-10/15 Hitachi DSA00164

    24C02

    Abstract: HB526A164DB-10 HB526A164DB-12 HB526A164DB-15 HM5216165TT C100-C107 Hitachi DSA0015 DQ381 Nippon capacitors
    Text: HB526A164DB Series 524,288-word x 64-bit × 2-bank Synchronous Dynamic RAM Module ADE-203-606 Z Preliminary Rev. 0.0 Jun. 18, 1996 Description The HB526A164DB is a 512k × 64 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM), mounted 4 pieces of 16-Mbit SDRAM (HM5216165TT) sealed in TSOP


    Original     		PDF HB526A164DB 288-word 64-bit ADE-203-606 16-Mbit HM5216165TT) 24C02) HB526A164DB 144-pin 24C02 HB526A164DB-10 HB526A164DB-12 HB526A164DB-15 HM5216165TT C100-C107 Hitachi DSA0015 DQ381 Nippon capacitors

    TSB11C01

    Abstract: TSB12C01APZ S200 S400 TSB12C01A
    Text: 1394 Link Layer Controller chip TSB12C01A Errata: Last Changed on 07/06/96 - bsh, rgg 0. Electrical isolation as described in Appendex J of IEEE 1394-1995 is not supported by the TSB12C01APZ . TI has an improved isolation technique, that is the recommended isolation solution.


    Original     		PDF TSB12C01A) TSB12C01APZ 12C01A TSB11C01. TSB11C01 TSB12C01APZ S200 S400 TSB12C01A

    Hitachi DSA00174

    Abstract: Nippon capacitors
    Text: HB52RD168DB-F 128 MB Unbuffered SDRAM S.O.DIMM 16-Mword x 64-bit, 100 MHz Memory Bus, 1-Bank Module 16 pcs of 16 M × 4 components PC100 SDRAM ADE-203-1097 (Z) Rev. 0.0 Sep. 10, 1999 Description The HB52RD168DB is a 16M × 64 × 1 bank Synchronous Dynamic RAM Small Outline Dual In-line


    Original     		PDF HB52RD168DB-F 16-Mword 64-bit, PC100 ADE-203-1097 HB52RD168DB 64-Mbit HM5264405FTB) HB52RD168DB 144-pin Hitachi DSA00174 Nippon capacitors

    Philips 3-Wire bus

    Abstract: No abstract text available
    Text: TO SHIBA TENTATIVE TD7623AFN TOSHIBA BIPOLAR DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TD7623AFN 3-WIRE AND |2C BUS SYSTEM, 2.3GHz DIRECT TWO MODULUS-TYPE FREQUENCY SYNTHESIZER FOR CATV The TD7623AFN can be combined with a micro CPU to create a highly functional frequency synthesizer. The


    OCR Scan     		PDF TD7623AFN TD7623AFN 27-bit 50kHz, 250kHz, SSOP16-P-225-0 Philips 3-Wire bus

    Nippon capacitors

    Abstract: hitachi AND 1996 AND sdram
    Text: HB526A164DB Series 524,288-word x 64-bit x 2-bank Synchronous Dynamic RAM Module HITACHI ADE-203-606 Z Preliminary Rev. 0.0 Jun. 18, 1996 Description The HB526A164DB is a 512k x 64 x 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM), mounted 4 pieces of 16-Mbit SDRAM (HM5216165TT) sealed in TSOP


    OCR Scan     		PDF HB526A164DB 288-word 64-bit ADE-203-606 16-Mbit HM5216165TT) 24C02) 144-pin Nippon capacitors hitachi AND 1996 AND sdram

    X-TAL reference

    Abstract: No abstract text available
    Text: TOSHIBA TENTATIVE TD7624AFN TOSHIBA BIPOLAR DIGITAL INTEGRATED CIRCUIT T• n 7a f i 7 A■ m A SILICON MONOLITHIC F m ■ Nmm 3-W IRE A N D |2C BUS S Y S T E M , 1.3 G H z D IRECT T W O M O D U LU S-TYP E F R EQ U EN C Y SYN TH ESIZER FOR TV A N D C A TV


    OCR Scan     		PDF TD7624AFN TD7624AFN 18-bit 19-bit SSOP16-P-225-0 23TYP X-TAL reference

    Untitled

    Abstract: No abstract text available
    Text: • ñ53SbGS DDTSTTS bSH ■ SIEMENS BTS6 1 2 N1 Smart Two Channel Highside Power Switch Features • • • • • • • • • • • • • Product Summary Overload protection Current limitation Short circuit protection Thermal shutdown Overvoltage protection including load dump


    OCR Scan     		PDF 53SbGS Lstems15* GPT05M7

    Untitled

    Abstract: No abstract text available
    Text: HB526A264EN-10/12 1,048,576-word x 64-bit x 2 bank Non Parity Synchronous Dynamic RAM Module 168-pin JEDEC Standard Outline Unbuffered 8 byte DIMM HITACHI ADE-203-485B (Z) Rev. 2.0 Apr. 29, 1996 Description The HB526A264EN belongs to 8 Byte DIMM (Dual In-line Memory Module) family, and has been


    OCR Scan     		PDF HB526A264EN-10/12 576-word 64-bit 168-pin ADE-203-485B HB526A264EN 16Mbit HM5216805TT) 24C02)

    Untitled

    Abstract: No abstract text available
    Text: TO SHIBA TENTATIVE TD7628FN TOSHIBA BIPOLAR DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TD7628FN 3-WIRE AND |2C BUS SYSTEM, 1.3GHz DIRECT TWO MODULUS-TYPE FREQUENCY SYNTHESIZER FOR TV AND CATV The TD7628FN can be combined with a micro CPU to create a highly functional frequency synthesizer. The


    OCR Scan     		PDF TD7628FN TD7628FN 18-bit 19-bit SSOP16-P-225-0

    HB526A164EN

    Abstract: No abstract text available
    Text: H B 5 2 6 A 1 6 4 E N -1 0 /1 2 524,288-word x 64-bit x 2 bank Non Parity Synchronous Dynamic RAM Module 168-pin JEDEC Standard Outline Unbuffered 8 byte DIMM HITACHI ADE-203-592 (Z) Preliminary Rev. 0.0 May 16, 1996 Description The HB526A164EN belongs to 8 Byte DIMM (Dual In-line Memory Module) family, and has been


    OCR Scan     		PDF 288-word 64-bit 168-pin ADE-203-592 HB526A164EN 16Mbit HM5216165TT) 24C02)

    Untitled

    Abstract: No abstract text available
    Text: MITEL MH89791 CEPT PCM 30 Transm it Equalizer Advance Information 9161-002-110-NA Features • Used with the MH89790 • Programmable equalization for different line lengths • 6dB loop around circuit Description The MH89791 is a programmable network for use


    OCR Scan     		PDF MH89791 9161-002-110-NA MH89790 MH89791 H89790 bE4T37D

    Untitled

    Abstract: No abstract text available
    Text: HB526A164EN-10/12 524,288-word x 64-bit x 2 bank Non Parity Synchronous Dynamic RAM Module 168-pin JEDEC Standard Outline Unbuffered 8 byte DIMM HITACHI ADE-203-592 (Z) Preliminary - Rev. 0.0 May 16, 1996 Description The HB526A164EN belongs to 8 Byte DIMM (Dual In-line Memory Module) family, and has been


    OCR Scan     		PDF HB526A164EN-10/12 288-word 64-bit 168-pin ADE-203-592 HB526A164EN 16Mbit HM5216165TT) 24C02)

    74VHC125

    Abstract: 74VHC125M 74VHC125MTC 74VHC125N 74VHC125SJ M14A M14D MTC14 VHC125
    Text: S E M IC O N D U C T O R Revised March 1999 TM General Description The VHC125 contains four independent non-inverting buff­ ers with 3-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technol­ ogy and achieves the high-speed operation similar to


    OCR Scan     		PDF 74VHC125 VHC125 74VHC125 74VHC125M 74VHC125MTC 74VHC125N 74VHC125SJ M14A M14D MTC14

    Untitled

    Abstract: No abstract text available
    Text: HM5216165 Series 524,288-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-280 A (Z) Preliminary Rev. 0.1 Oct. 20, 1995 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.


    OCR Scan     		PDF HM5216165 288-word 16-bit ADE-203-280 Hz/83 Hz/66 5216165TT

    Untitled

    Abstract: No abstract text available
    Text: HM5216165 Series 524,288-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-280B Z Rev. 2.0 Jun. 20, 1997 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.


    OCR Scan     		PDF HM5216165 288-word 16-bit ADE-203-280B Hz/83 HM5216165-1 HM5216165-10/15