SMD W2T

Abstract: w2t smd BTS 131 SMD MBA IST DATE SHEET SN54ACT3632
Contextual Info: • fl^bi723 aiiossT ist. ■ SN54ACT3632 512x36x2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY _ _ S G B S310-SEPTEM BER 1996 * Free-Running CLKA and CLKB Can Be Asynchronous or Coincident ► Two Independent 512 x 36 Clocked FIFOs

Contextual Info: TEXAS INSTR LOGIC a^bi723 ooaabab o • 31E 5 tub 54ACT11175, 74ACT11175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR - p TI0111—D33B5, 4 f e - c nDECEMBER -C P I*19 ' Inputs are TTL-Voltage Compatible • Applications Include: Buffer/Storage Registers, Shift Registers, Pattern

Contextual Info: SN74BCT29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER S C B S 257- SEPTEMBER 1987 - REVISED NOVEMBER 1993 DW OR NT PACKAGE • BICMOS Process With TTL Inputs and Outputs T O P V IE W • State-of-the-Art BICMOS Design Significantly Reduces Standby Current

sf 127d

Abstract: 127D IC51-1324-828 SN74ABT3611 D103E
Contextual Info: SN74ABT3611 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS127D - JULY 1992 - REVISED SEPTEMBER 1995 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 x 36 Clocked FIFO Buffering Data From Port A to Port B Mailbox-Bypass Register In Each Direction

Ultra High Voltage Hexfets

Abstract: dioda rectifier EMBI IRF1010 IRF840LC dioda 12B dioda OA 50 TF 100 FEMA
Contextual Info: PD-9.1069 International S Rectifier IRF840LC HEXFET* Power MOSFET • • • • • • Ultra Low Gate Charge Reduced Gate Drive Requirement Enhanced 30V V gs Rating Reduced Ciss> Coss. Crss Extremely High Frequency Operation Repetitive Avalanche Rated Vdss= 500V

A14C

Abstract: A15C IC51-1324-828 SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3622 256 x 36 x 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY _ SCAS247A -A U G U S T 1993 - REVISED JUNE 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident IRB, ORB, AEB, and AFB Flags Synchronized by CLKB Two Independent Clocked FIFOs Buffering

Contextual Info: SN54LVTH18516, SN54LVTH182516, SN74LVTH18516, SN74LVTH182516 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS SCBS672A - AUGUST 1 9 9 6 - REVISED DECEMBER 1996 Members of the Texas Instruments SCOPE Family of Testability Products Members of the Texas Instruments

D110D

Abstract: SN74LVT8980 ic tms 1000 strs LVT8980 SN54LVT8980 IR1101
Contextual Info: SN54LVT8980, SN74LVT8980 EMBEDDED TEST-BUS CONTROLLERS IEEE STD 1149.1 JTAG TAP MASTERS WITH 8-BIT GENERIC HOST INTERFACES . • • • • • • • •

SN75976A

Abstract: SN75976A1DGGR SN75976A1DL SN75976A1DLR SN75LBC976
Contextual Info: SN75976A 9-CHANNEL DIFFERENTIAL TRANSCEIVER S L L S 2 1 8 -M A Y 1995 • ■ • Improved Speed and Package Replacement for the SN75LBC976 I V • Designed to Operate at up to 20 Million Data Transfers per Second Fast-20 SCSI I • Nine Differential Channels for the Data and

SN74ACT53861

Abstract: TUAZ 8x256 bit-slice
Contextual Info: SN74ACT53861 4096 x MULTIPLE-QUEUE MULTI-Q FIRST-IN, FIRST-OUT MEMORY WITH THREE PROGRAMMABLE-DEPTH BUFFERS AND CELL-BASED FLAGS ^ _ 4K x 18 Total Memory Size Three Programmable-Depth FIFOs on One Device Memory Allocation of 256 x 18 Blocks Two Separate Read and Write Clocks

Contextual Info: SN54LVT18640, SN54LVT182640, SN74LVT18640, SN74LVT182640 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT INVERTING BUS TRANSCEIVERS S C B S310A - M ARCH 1994 - REVISED A U G U S T 1994 SN54LVT18640 . . . WD PACKAGE SN74LVT18640. . . DGG OR DL PACKAGE TOP VIEW • Members of the Texas Instruments

LVTH241

Abstract: SN54LVTH241 SN74LVTH241
Contextual Info: r \ SN54LVTH241, SN74LVTH241 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS352D - MARCH 1994 - REVISED DECEMBER 1996 State-of-the-Art Advanced BiCMOS Technology ABT Design for 3.3-V Operation and Low-Static Power Dissipation SN54LVTH241 J PACKAGE