SPARC
Abstract: CB123 FBUL
Text: Assembly Language Syntax The notations given in this section are taken from Sun’s SPARC Assembler and are used to describe the suggested assembly language syntax for the instruction definitions explained on page 5. Understanding the use of type fonts is crucial to understanding the assembly language syntax in the instruction definitions. Items in typewriterfont are literals, to be
|
Original
|
4168C
SPARC
CB123
FBUL
|
PDF
|
EZ 523
Abstract: 133NE assembly instruction 3005 assembly instruction 3015 11 tnc-50-2-112 assembly instruction 3024 assembly instruction 3008 hubersuhner 11 TNC-50-3-116 OF 23 TNC-50-0-6 16TNC-50-3-28
Text: SERIES TNC 50 8, COAXIAL MINIATURE CONNECTORS DESCRIPTION CONTENTS HUBER+SUHNER TNC connectors are threaded RF connectors applicable from DC up to 11 GHz. Precision designs using a dielectric bead are suitable for use up to 18 GHz. The threaded coupling mechanism improves
|
Original
|
TNC-50-0-1/133
TNC-0-0-1/-33
EZ 523
133NE
assembly instruction 3005
assembly instruction 3015
11 tnc-50-2-112
assembly instruction 3024
assembly instruction 3008
hubersuhner 11 TNC-50-3-116
OF 23 TNC-50-0-6
16TNC-50-3-28
|
PDF
|
AVR32006
Abstract: avr32 avr32-gcc avr32-as avr32-g
Text: AVR32006 : Getting started with GCC for AVR32 Features • This guide will give some tips and tricks for using the GNU Compiler Collection GCC for developing C/C+ code for AVR32. • Optimization techniques for the compiler and linker is also provided • The guide applies to versions of GCC for AVR32 >=4.2.1.
|
Original
|
AVR32006
AVR32
AVR32.
32-bit
2074A-AVR-12/07
AVR32006
avr32
avr32-gcc
avr32-as
avr32-g
|
PDF
|
ARM7 instruction set for atmel
Abstract: ARM7 instruction set arm7 architecture ARM7 pin configuration features of ARM7 avr USART multiprocessor ARM7 processor instruction set ARM7 features ARM7 BLOCK DIAGRAM ARM7 instruction set cycle timing
Text: AVR32007: UC3 C-coding Guidelines for ARM7 Developers 1 Introduction This document describes differences between the AVR 32 UC3 and ARM7TM CPU architectures, and gives guidelines on developing applications on the AVR32 UC3 architecture for developers with ARM7 experience. The reader should refer to the
|
Original
|
AVR32007:
AVR32
AVR32006
AVR32"
32-bit
32075B-AVR-03/08
ARM7 instruction set for atmel
ARM7 instruction set
arm7 architecture
ARM7 pin configuration
features of ARM7
avr USART multiprocessor
ARM7 processor instruction set
ARM7 features
ARM7 BLOCK DIAGRAM
ARM7 instruction set cycle timing
|
PDF
|
AVR block diagram
Abstract: Programmers ATMEL AT29C1024 ATSTK594 3562A ATMEL 7800 AT29C1024 A800H 16 bit avr sram 6800 AT40K40
Text: Extending FPSLIC Program Code Space to 128 Kbytes by Using External Flash Memory 1. Introduction Atmel AT94K10 and AT40K40 FPSLIC devices include 36 Kbytes of dual-port SRAM, which is shared by both the FPGA and AVR core blocks. The SRAM is soft partitioned and used by the AVR for program code and user data storage, while it is used
|
Original
|
AT94K10
AT40K40
AT29C1024
AVR block diagram
Programmers ATMEL AT29C1024
ATSTK594
3562A
ATMEL 7800
A800H
16 bit avr
sram 6800
|
PDF
|
MCS-96 Macro Assembler Users guide
Abstract: 80C196KB MCS-96 Users guide 80C196KB instruction set 74164 counter MCS-96 development 122350 270646 intel asm-96 80c196KB users
Text: AP-466 APPLICATION NOTE Using the 80C196KB ROBIN SHEER EMD APPLICATIONS November 1991 Order Number 272116-001 Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in
|
Original
|
AP-466
80C196KB
80C196KB
16-Bit
AP-248
MCS-96
iC-96
MCS-96 Macro Assembler Users guide
MCS-96 Users guide
80C196KB instruction set
74164 counter
MCS-96 development
122350
270646
intel asm-96
80c196KB users
|
PDF
|
AVR109
Abstract: rww resistor AVR035 avrprog.exe
Text: AVR109: Self-programming Features • • • • AVR109 Code Fits in All AVR Microcontrollers with Boot Block Read and Write Both Flash and EEPROM Memories Uses the AVRProg Protocol Read and Write Lock Bits 8-bit RISC Microcontroller Introduction This application note describes how an AVR with the Store Program Memory SPM
|
Original
|
AVR109:
AVR109
1644D
rww resistor
AVR035
avrprog.exe
|
PDF
|
AVR001: Conditional Assembly and portability macros
Abstract: assembly code atmega16 AVR001
Text: AVR001: Conditional Assembly and portability macros Features • • • • Increased portability Easier Code Writing Simplified I/O Register Access Improved Assembly Status Feedback 8-bit Microcontrollers Application Note 1 Introduction This application note describes the Conditional Assembly feature present in the
|
Original
|
AVR001:
2550E-AVR-04/08
AVR001: Conditional Assembly and portability macros
assembly code atmega16
AVR001
|
PDF
|
ABYZ
Abstract: 8S2 EIAJ SOIC 8a2 marking AT25640B atmel part "marking" mo-229 MARK ABYZ SOT23-5
Text: Features • Serial Peripheral Interface SPI Compatible • Supports SPI Modes 0 (0,0) and 3 (1,1) – Datasheet Describes Mode 0 Operation • Low-voltage and Standard-voltage Operation • • • • • • • • • – 1.8 (VCC = 1.8V to 5.5V) 20 MHz Clock Rate (5V)
|
Original
|
32-byte
8535C
ABYZ
8S2 EIAJ SOIC
8a2 marking
AT25640B
atmel part "marking" mo-229
MARK ABYZ SOT23-5
|
PDF
|
atmega16 software uart
Abstract: avrasm32 advantages of atmega16 AVR001
Text: AVR001: Conditional Assembly and Portability Macros Features • • • • Increased Assembly Portability Easier Code Writing Simplified I/O Register Access Improved Assembly Status Feedback Introduction 8-bit Microcontroller Application Note This application note describes the Conditional Assembly feature present in the AVR
|
Original
|
AVR001:
2550B
atmega16 software uart
avrasm32
advantages of atmega16
AVR001
|
PDF
|
avrasm32
Abstract: atmega16 assembly AVR001 directives ATmega161
Text: AVR001: Conditional Assembly and Portability Macros Features • • • • Increased Assembly Portability Easier Code Writing Simplified I/O Register Access Improved Assembly Status Feedback Introduction 8-bit Microcontroller Application Note This application note describes the Conditional Assembly feature present in the AVR
|
Original
|
AVR001:
2550C
avrasm32
atmega16 assembly
AVR001
directives
ATmega161
|
PDF
|
AVR001
Abstract: Atmega128 software
Text: AVR001 Conditional Assembly and portability macros Features • • • • Increased portability Easier Code Writing Simplified I/O Register Access Improved Assembly Status Feedback 8-bit Microcontrollers Application Note 1 Introduction This application note describes the Conditional Assembly feature present in the
|
Original
|
AVR001
2550D-AVR-03s
2550D-AVR-03/05
Atmega128 software
|
PDF
|
transistor A1046
Abstract: transistor A1267 A1267 A1046 8085 assembly language A1516 A1300 transistor A1015 80188 Programmers Reference Manual intel 80c188
Text: 80C186XL/80C188XL Microprocessor User’s Manual 80C186XL/80C188XL Microprocessor User’s Manual 1995 Order Number 272164-003 Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including
|
Original
|
80C186XL/80C188XL
transistor A1046
transistor A1267
A1267
A1046
8085 assembly language
A1516
A1300 transistor
A1015
80188 Programmers Reference Manual
intel 80c188
|
PDF
|
4280D
Abstract: TSC695
Text: Active Errata List • DMA Access Request During Processor LOCK Accesses • BUSRDY* and Waitstates on Exchange Memory Area • Floating-point Compare Instruction Followed by OR Instruction Errata History Product Release Errata List All lot numbers 1, 2, 3
|
Original
|
4280D
TSC695
|
PDF
|
|
|
AVRProg
Abstract: No abstract text available
Text: AVR109: Self-programming Features • AVR109 Code Fits in All AVR Microcontrollers with Boot Block • Read and Write Both Flash and EEPROM Memories • Uses the AVRProg Protocol • Read and Write Lock Bits Introduction This application note describes how an
|
Original
|
AVR109:
AVR109
03/00/xM
AVRProg
|
PDF
|
High Speed Contacts
Abstract: High Speed 12-130 thermax 1536-224 BACC47GM1 tensolite 24443 EN3155 Cross Reference EN3155-074 BMS1372T03C04G024 en3155 m39029
Text: Amphenol High Frequency Contacts for Multi-pin Connectors HIGH PERFORMANCE CONNECTORS AND CONTACTS PROVIDE SECURE, RELIABLE DATA TRANSMISSION 12-130-4 Leading in the electrical connection arena, Amphenol products are used on major programs of military and
|
Original
|
|
PDF
|
vhdl code for 16 BIT BINARY DIVIDER
Abstract: ASR16 4 bit binary multiplier Vhdl code SDRAM edac atmel edac AT697E vhdl code for 4 bit ram vhdl sdram
Text: Active Errata List 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. Multiplier/Divider Failure on Negative Operands Treatments Call Return Address Failure with Large Displacement Byte and Half-word Write to SRAM Failure when Executing from SDRAM Wrong PC stored during FPU exception trap
|
Original
|
512MB
4409C
vhdl code for 16 BIT BINARY DIVIDER
ASR16
4 bit binary multiplier Vhdl code
SDRAM edac
atmel edac
AT697E
vhdl code for 4 bit ram
vhdl sdram
|
PDF
|
AT94K
Abstract: ATSTK94 CS10 CS11 CS12
Text: Sleep Modes and Achieving Low-power Supply Current on AT94 Series FPSLIC Devices Introduction The purpose of this application note is to provide designers with an understanding of the 3 available Sleep Modes and how to achieve low-power supply current on AT94
|
Original
|
AT94K
ATSTK94
CS10
CS11
CS12
|
PDF
|
AT90S4414
Abstract: AT90S8515
Text: Errata • • • • • The SPI can Send Wrong Byte Reset During EEPROM Write SPI Interrupt Flag can be Undefined After Reset Serial Programming at Voltages below 3.0 Volts Skip Instruction with Interrupts 5. The SPI can Send Wrong Byte If the SPI is in master mode, it will restart the old transfer if new data is written on
|
Original
|
1195C
09/99/xM
AT90S4414
AT90S8515
|
PDF
|
AT90S4414
Abstract: AT90S8515
Text: Errata • • • • • • The SPI can Send Wrong Byte Reset During EEPROM Write SPI Interrupt Flag can be Undefined After Reset Verifying EEPROM in System Serial Programming at Voltages below 3.0 Volts Skip Instruction with Interrupts 6. The SPI can Send Wrong Byte
|
Original
|
1195B
01/99/xM
AT90S4414
AT90S8515
|
PDF
|
AT90S4414
Abstract: No abstract text available
Text: Errata • • • • • • The SPI can Send Wrong Byte Reset During EEPROM Write SPI Interrupt Flag can be Undefined After Reset Verifying EEPROM in System Serial Programming at Voltages below 3.0 Volts Skip Instruction with Interrupts 6. The SPI can Send Wrong Byte
|
Original
|
1194B
01/99/xM
AT90S4414
|
PDF
|
AT25640B-SSHL-T
Abstract: AT25640B-SSHL-B AT25320B-SSHL-T AT25320B AT25320B-XHL-B AT25640B AT25640B-MAHL AT25320B-SSHL-B 640B a13 marking sot23
Text: Features • Serial Peripheral Interface SPI Compatible • Supports SPI Modes 0 (0,0) and 3 (1,1) – Datasheet Describes Mode 0 Operation • Low-voltage and Standard-voltage Operation • • • • • • • • – 1.8 (VCC = 1.8V to 5.5V) 20 MHz Clock Rate (5V)
|
Original
|
32-byte
AT25320B/640B
8535D
AT25640B-SSHL-T
AT25640B-SSHL-B
AT25320B-SSHL-T
AT25320B
AT25320B-XHL-B
AT25640B
AT25640B-MAHL
AT25320B-SSHL-B
640B
a13 marking sot23
|
PDF
|
58338-1
Abstract: PULLEY 931800-1 MTA-100 MTA100
Text: Instruction Sheet Feed Track Assembly 853546-1 and Base Assembly 853542-1 for MTA-.100 C losed-End Receptacle Connectors M 1. INTRODUCTION This instruction sheet covers the operation and m aintenance of A M P * Feed Track A ssem bly 8 53 5 4 6 -1 and Base A sse m bly 8 5 3 5 4 2 -1 , designed
|
OCR Scan
|
|
PDF
|
j001 1003
Abstract: 74LS00 TTL Signetics 2650 VCU 2136 j001 1003 ic signetics hand book signetics 2650 8k ram ic j001 1003 strz 2026 pss 3056
Text: > l b l IC I I V » 2650 flllCROPROCEftOR CONTENTS I IN T R O D U C T IO N IN T R O D U C IN G T H E 26 50 F A M I L Y . 3 F E A T U R E S OF T H E 26 50 F A M IL Y 4 4 Microprocessor F e a tu re s .
|
OCR Scan
|
|
PDF
|
