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    AS5SS128K36 Search Results

    AS5SS128K36 Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Type PDF
    AS5SS128K36 Austin Semiconductor 128K x 36 SSRAM SYNCHRONOUS ZBL SRAM FLOW-THRU OUTPUT Original PDF
    AS5SS128K36DQ-11/IT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF
    AS5SS128K36DQ-11_IT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF
    AS5SS128K36DQ-11/XT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF
    AS5SS128K36DQ-11_XT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF
    AS5SS128K36DQ-12/IT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF
    AS5SS128K36DQ-12_IT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF
    AS5SS128K36DQ-12/XT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF
    AS5SS128K36DQ-12_XT Austin Semiconductor 128K x 36 SSRAM - synchronous ZBL SRAM flow-thru output Original PDF

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    Untitled

    Abstract: No abstract text available
    Text: SSRAM AS5SS128K36 128K x 36 4Mb FLOW THROUGH ‘NO WAIT’ STATE BUS SYNCHRONOUS SRAM FEATURES GENERAL DESCRIPTION • Available in Mil-Temp*, Enhanced* & Industrial Ranges • 100 percent bus utilization • No wait cycles between Read and Write 1 • Internal self-timed write cycle


    Original
    PDF AS5SS128K36 100-Pin -40oC 105oC -55oC 125oC AS5SS128K36

    123D

    Abstract: AS5SS128K36
    Text: SRAM Austin Semiconductor, Inc. GENERAL DESCRIPTION 128K x 36 SSRAM The Austin Semiconductor, Inc. Zero Bus Latency SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. ASI’s 4Mb ZBL SRAMs integrate a 128K x 36 SRAM core


    Original
    PDF AS5SS128K36 AS5SS128K36DQ-11/IT -40oC -55oC 125oC 123D AS5SS128K36

    Untitled

    Abstract: No abstract text available
    Text: SRAM Austin Semiconductor, Inc. GENERAL DESCRIPTION 128K x 36 SSRAM The Austin Semiconductor, Inc. Zero Bus Latency SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. ASI’s 4Mb ZBL SRAMs integrate a 128K x 36 SRAM core


    Original
    PDF AS5SS128K36 AS5SS128K36 AS5SS128K36DQ-11/IT -40oC -55oC 125oC

    123D

    Abstract: AS5SS128K36
    Text: SSRAM Austin Semiconductor, Inc. GENERAL DESCRIPTION 128K x 36 SSRAM The Austin Semiconductor, Inc. Zero Bus Latency SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process. ASI’s 4Mb ZBL SRAMs integrate a 128K x 36 SRAM core


    Original
    PDF AS5SS128K36 AS5SS128K36DQ-11/IT -40oC -55oC 125oC 123D AS5SS128K36

    BwD tran

    Abstract: No abstract text available
    Text: SYNCHRONOUS ZBLSRAM FLOW-THRU OUTPUT AVAILABLE AS MILITARY SPECIFICATIONS FEATURES • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 100, 83, 67 and 50 MHz • Fast access time: 9, 10, 11, 15 ns • Internally synchronized registered outputs eliminate the


    OCR Scan
    PDF MIL-STD-883 exAS5SS128K36 MIL-STD-883 AS5SS128K36 DS000075 BwD tran

    Untitled

    Abstract: No abstract text available
    Text: SYNCHRONOUS ZBLSRAM FLOW-THRU OUTPUT AVAILABLE AS MILITARY SPECIFICATIONS FEATURES • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 100, 83, 67 and 50 MHz • Fast access time: 9, 10, 11, 15 ns • Internally synchronized registered outputs eliminate the


    OCR Scan
    PDF MIL-STD-883 MIL-STD-883 AS5SS128K36 DS000075