AK6321024
Abstract: AK63232Z AK63264
Text: Accutek Microcircuit Corporation AK63232Z 32,768 x 32 Bit CMOS / BiCMOS Static Random Access Memory DESCRIPTION The Accutek AK63232Z SRAM Module consists of fast high performance SRAMs mounted on a low profile, 64 pin ZIP Board. The module utilizes four 28 pin 32K x 8 SRAMs in 300 mil SOJ packages
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AK63232Z
AK63232Z
64-Pin
AK63232Z-12
AK6321024
AK63264
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G1123
Abstract: No abstract text available
Text: TBP24SAI0 1024 BITS 256 WORDS BY 4 BITS STANDARD PROGRAMMABLE READ-ONLY MEMORIES WITH OPEN-COLLECTOR OUTPUTS pin assignment logic symbol TBP24SA10 J OR N PACKAGE TBP24SA10 PROM 256 X 4 AOA1A2A3A4A5A6- (TOP VIEW) (5) A6 £ 1 U i . 3 v c c A5 C 2 15 3 A 7
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TBP24SAI0
TBP24SA10
G1123
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L817
Abstract: No abstract text available
Text: TBP24SA41 4096 BITS 1024 WORDS BY 4 BITS STANDARD PROGRAMMABLE READ-ONLY MEMORIES WITH OPEN-COLLECTOR OUTPUTS pin assignment logic symbol TBP24SA41 TBP24SA41 J OR N PACK/ (TOP VIEW PROM 1024 X 4 AOA1A2A3A4A5A6A7A8A9G2G1- (5) O', QO Q1 A3 C 4 AOC 5 3 Vcc
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TBP24SA41
TBP24SA41
L817
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C193
Abstract: No abstract text available
Text: TBP28S166 16,384 BITS 2084 WORDS BY 8 BITS STANDARD PROGRAMMABLE READ-ONLY MEMORIES WITH 3-STATE OUTPUTS logic symbol AOA1 A2 A3 A4 A5 A6 A7 A8 A9 A10 G3 G2 pin assignment TBP28S166 (8 ) (7) (6 ) AV (5) AV (3) >A (2) 2047 (1) (23) -Q0 ( 10) “Q1 (11) -Q2
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TBP28S166
TBP28S166
C193
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Untitled
Abstract: No abstract text available
Text: FCT Interface Logic HARRIS S E M I C O N D U C T O R HARRIS RCA GE INTERSIL CD 54/74FC T653, CD54/74FCT653AT CD 54/74FC T654, CD54/74FCT654AT July 1990 Octal Bus Transceivers/ Registers, Open-Drain A Side , 3-State (B Side) AOA1 A2 A DATA « A3 A4 PORT A5 A6A7 OEBA
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54/74FC
CD54/74FCT653AT
CD54/74FCT654AT
CD54/74FCT653,
CD54/74FCT653AT
CD54/74FCT654,
CD54/74FCT654AT
FCT653,
FCT654)
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Untitled
Abstract: No abstract text available
Text: TBP28SA86A 8192 BITS 1024 WORDS BY 8 BITS STANDARD PROGRAMMABLE READ-ONLY MEMORIES WITH OPEN-COLLECTOR OUTPUTS pin assignment logic symbol TBP28SA86A TBP28SA86A JW OR NW PACKAGE PROM 1024 X 8 AOA1A2A3A4- (TOP VIEW) (8 ) (7) A£ (6) AÛ (5) (4) A£ (3) A 5( 2)
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TBP28SA86A
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Untitled
Abstract: No abstract text available
Text: TBP28S86A 8192 BITS 1024 WORDS BY 8 BITS STANDARD PROGRAM M ABLE READ-ONLY M EM ORIES WITH 3-STATE OUTPUTS logic symbol pin assignment TBP28S86A TBP28S86A JW OR NW PACKAGE (TOP VIEW) PROM 1024 X 8 (8 ) AOA1- (7) A2- (5) A3- (4) A4- (3) ( 2) A 5A 6- 1023
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TBP28S86A
TBP28S86A
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Untitled
Abstract: No abstract text available
Text: SMJ416160, SMJ418160 1048576-WORD BY 16-BIT HIGH-SPEED DRAM 1 SGMS720A - APRIL 1995 - REVISED JUNE 1995 XXX PACKAGE TOP VIEW ACCESS ACCESS ACCESS TIME TIME TIME '41x160-60 41x160-70 '41x160-80 • • • • • • • • tRAC MAX 60 ns 70 ns SO n* *CAC
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SMJ416160,
SMJ418160
1048576-WORD
16-BIT
SGMS720A
41x160-60
41x160-70
41x160-80
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Untitled
Abstract: No abstract text available
Text: TMS44100, TMS44100P 4194304-BIT DYNAMIC RANDOM-ACCESS MEMORY SMHS410F-SEPTEMBER 1989-REVISED DECEMBER 1992 Single 5-V Power Supply ±10% Tolerance Performance Ranges: ACCESS ACCESS ACCESS SD P AC K A G E t (TOP VIEW) DJ P A C K A G E t (TOP VIEW) Organization . . . 4194 304 x 1
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TMS44100,
TMS44100P
4194304-BIT
SMHS410F-SEPTEMBER
1989-REVISED
TMS44100/P-60
TMS44100/P-70
TMS44100/P-80
A0-A10
TMS44100
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TMS47C256 ROM
Abstract: No abstract text available
Text: TE XA S INS TR -CASIC/NEHORY} 77 ADVANCE INFORMATION 0^1725 DE 0040=107 4 | ~ TMS47C256 32,768-WORD BY 8-BIT READ-ONLY M EM O RY NOVEMBER 1985 N PACKAGE • 32,768 X 8 Organization • Fully Static No Clocks, No Refresh • All Inputs and Outputs TTL Compatible
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TMS47C256
768-WORD
TMS47C256 ROM
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27LV010A
Abstract: No abstract text available
Text: TMS27LV010A1 048 576-BIT UV ERASABLE LOW VOLTAGE PROGRAMMABLE ROM TMS27LV010A1 048 576-BIT LOW VOLTAGE ONE-TIME PROGRAMMABLE ROM SMLS113-DECEMBER 1992 x 8 J AND N PACKAGESt TOP VIEW Single 3.3-V Power Supply Operationally Compatible With Existing 1-Megabit EPROMs
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TMS27LV010A1
576-BIT
SMLS113-DECEMBER
32-Pin
32-Lead
27LV010A-20
27LV010A-25
27LV010A
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TC518129
Abstract: de interlace
Text: TOSHIBA TC518129AP/ASP/AF/AFW-80/10/12 TC518129APL/ASPL/AFL/AFWL30/10/12 TC518129AFTLS0/10/12 SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The T C 5 1 8 1 2 9 A is a 1M bit high speed C M O S p se udo static R AM organized as 131,07 2 w o rd s by 8 bits. The TC 5 18 1 29A utilizes
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TC518129AP/ASP/AF/AFW-80/10/12
TC518129APL/ASPL/AFL/AFWL30/10/12
TC518129AFTLS0/10/12
TC518129APL/ASPL/AFL/AFWL/AFTL-80/10/12
AO-A16
TC518129
de interlace
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2332 eprom
Abstract: PIN-20 IC DIAGRAM 2332 rom 2732A eprom
Text: TMS2332 4096-WORD BY 8-BIT READ-ONLY MEMORY SEPTEMBER 1984 - REVISED NOVEMBER 1985 4 0 9 6 X 8 Organization N PACKAGE All Inputs and Outputs TTL Compatible TOP VIEW A 7 C 1 ^ 2 4 3 v Cc A6£ 2 23 3 A 8 A5 £ 3 22 > 9 Fully Static (No Clocks. No Refresh)
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TMS2332
4096-WORD
2332 eprom
PIN-20 IC DIAGRAM
2332 rom
2732A eprom
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Ks-7b
Abstract: No abstract text available
Text: TMS417800, TMS417800P 2 097152 WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORIES S M K S 7 8 0 -D E C E M B E R 1992 x 8 DE P AC K A G E t DZ P A C K AG E t TOP VIEW (TOP VIEW) * Performance Ranges: vcc[ 1o D Q 0[ 2 ACCESS ACCESS ACCESS READ TIME TIME TIME OR WRITE
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TMS417800,
TMS417800P
417800/P-60
417800/P-70
417800/P-80
TMS417800
Ks-7b
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Untitled
Abstract: No abstract text available
Text: SM 64C16, SM J64C16 4096 WORD BY 4-BIT STATIC RAMS MARCH 1 98 7 —REVISED NOVEMBER 1987 Common I/O JO PACKAGE TOP VIEW • Military Temperature Range . . . - 5 5 ° C to 125°C (M Suffix) • Fast Static Operation • Battery Back-Up Operation . . . 2-Volt Data
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64C16,
J64C16
64C16-35
64C16-45
SM64C16,
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Untitled
Abstract: No abstract text available
Text: TMS416160, TMS416160P 1 048 576-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMKS660-DECEMBER 1992 Organization. . . 1 048 576 x 16 RE P A C K A G E t DC P A C K AG E t TOP VIEW (TOP VIEW) Single 5-V Supply (10% Tolerance) '416160/P-60 '416160/P-70
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TMS416160,
TMS416160P
576-WORD
16-BIT
SMKS660-DECEMBER
416160/P-60
416160/P-70
416160/P-80
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MATRA
Abstract: No abstract text available
Text: Te m ic HM 65764 MATRA MHS 8K x 8 High Speed CMOS SRAM Description The HM 65764 is a high speed CMOS static RAM organized as 8192x8 bits. It is manufactured using MHS high performance CMOS technology. Access times as fast as 15 ns are available with maximum power consumption of only 743 mW.
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8192x8
MATRA
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Untitled
Abstract: No abstract text available
Text: SONY CXK77410J -10/12/15 262,144-WORD by 4-BIT HIGH SPEED CMOS SYNCHRONOUS STATIC RAM PRELIMINARY Description The CXK77410J is a high speed CMOS syn chronous static RAM with separate I/O pins, or ganized as 262,144-words by 4-bits. This synchronous SRAM integrates input registers,
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CXK77410J
144-WORD
CXK77410J
144-words
A0-A17
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7A SF 51
Abstract: BCE-078 2900Hz haf0
Text: Hybrid ICs T D K CORP SäE D • 0 0 2 1 2 4 0 D D D b 4 b ? T3T ■ TDKA DIGITAL AUDIO ACTIVE LOW PASS FILTERS, AL SERIES EXAMPLE A LO 17 A fi Part No. Filter factor AL017 9th 9th AL018 AL030 Cut-off frequency (kHz) Ripple (dB) Attenuation (dB) Distortion
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AL017
AL018
AL030
HAF0541
HAF0551
HAF0541
10kHz
HAF0551
2000Hz]
50kHz]
7A SF 51
BCE-078
2900Hz
haf0
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Q67100-Q3018
Abstract: Q67100-Q3019
Text: SIEM EN S 8M X 36-Bit EDO-DRAM Module HYM 368035S/GS-60 Advanced Inform ation • 8 388 608 words by 36-Bit organization in 2 banks • Fast access and cycle time 60 ns RAS access time 15 ns CAS access tim e 104 ns cycle time • Hyper page mode EDO capability
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36-Bit
368035S/GS-60
L-SIM-72-17)
L-SIM-72-17
Q67100-Q3018
Q67100-Q3019
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PDM44018
Abstract: No abstract text available
Text: bTHlDTD OODCmS? Tbfc. IP AT PDM 44018 64K x 18 Fast CMOS Synchronous Static SRAM with Burst Counter Features Description □ Interfaces directly with the i486 , Pentium™ processors 66.6,60,50,40,33.3 MHz The PDM44018 is a 1,179,648 bit synchronous ran
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PDM44018
64Kxl8
52-pin
PDM44018
A0-A15
DQ0-DQ17
MIL-STD-883
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DS24
Abstract: No abstract text available
Text: O K I Semiconductor MSC238361A-xxBS24/PS24 8,388,608-Word x 36-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI M SC238361A-xxBS24/ DS24 is a fully decoded 8,388,608-word x 36-bit CMOS Dynamic Random Access Memory Module composed of sixteen 16-Mb DRAMs 4M x 4 in SOJ packages
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MSC238361A-xxBS24/PS24
608-Word
36-Bit
MSC238361A-xxBS24/
16-Mb
72-pin
DS24
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12024-3
Abstract: 74LVT16652 74LVT16652MEA 74LVT16652MEAX 74LVT16652MTD 74LVT16652MTDX LVT16652 MTD56
Text: LVT16652 ADVANCE INFORMATION National Semiconductor 74LVT16652 3.3V ABT 16-Bit Transceiver/Register with TRI-STATE Outputs General Description Features The LVT16652 consists of sixteen bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multi
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74LVT16652
16-Bit
LVT16652
SG112E
12024-3
74LVT16652
74LVT16652MEA
74LVT16652MEAX
74LVT16652MTD
74LVT16652MTDX
MTD56
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Untitled
Abstract: No abstract text available
Text: AMD£I Am28F256 256 Kilobit 32 K X 8-Bit CMOS 12.0 Volt, Bulk Erase Flash Memory DISTINCTIVE CHARACTERISTICS • High performance ■ — 70 ns maximum access time ■ CMOS Low power consumption ■ Flasherase Electrical Bulk Chip-Erase — One second typical chip-erase
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Am28F256
32-Pin
AM28F256
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