JEDEC J-STD-020d.1
Abstract: JESD625-a AND8003 12MSB17722C JEDEC J-STD-033b.1 jedec JESD625-a AND8003/D APPLICATION note JESD625 J-STD-020d.1 JEDEC J-STD-020d
Text: AND8003/D Storage and Handling of Drypacked Surface Mounted Devices SMD Prepared by: R. Kampa, D. Hagen, W. Lindsay, and K.C. Brown Revised by J. Guzman−Guevarra http://onsemi.com APPLICATION NOTE INTRODUCTION The Humidity Indicator Card provides the customer with a
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AND8003/D
JEDEC J-STD-020d.1
JESD625-a
AND8003
12MSB17722C
JEDEC J-STD-033b.1
jedec JESD625-a
AND8003/D APPLICATION note
JESD625
J-STD-020d.1
JEDEC J-STD-020d
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and8003
Abstract: A112 A113 resistance ALUMINUM
Text: AND8003/D Storage and Handling of Drypacked Surface Mounted Devices SMD http://onsemi.com Prepared by: R. Kampa, D. Hagen, W. Lindsay, and K.C. Brown APPLICATION NOTE INTRODUCTION The desiccant packed in each bag will keep the internal humidity level below 20% RH for at least one year, under
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AND8003/D
r14153
and8003
A112
A113
resistance ALUMINUM
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kvt22
Abstract: transistor BD 540 MC100EL35 MC100EP52 MC10EP31 MC100EP35 MC10EP01 MC100EP31 MC10EPT20
Text: MC100LVELT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Low Voltage Positive ECL levels are used, only +3.3 V and ground are required. The small outline
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MC100LVELT22
LVELT22
KVT22
MC100LVELT22/D
AN1405/D
MC100LVELT22D
AN1560/D
AND8010/D
transistor BD 540
MC100EL35
MC100EP52
MC10EP31
MC100EP35
MC10EP01
MC100EP31
MC10EPT20
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E142 wafer format
Abstract: HEL32 MR 4710 IC 300w power amplifier circuit diagram HEL05 klt22 HEL12 HEL31 HEL16 HLT22 HLT28
Text: DL140/D Rev. 6, Jan-2001 High Performance ECL Data ECLinPS and ECLinPS Lite™ High Performance ECL Device Data ECLinPS, ECLinPS Lite, and Low Voltage ECLinPS DL140/D Rev. 6, Jan–2001 SCILLC, 2001 Previous Edition 2000 “All Rights Reserved”
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DL140/D
Jan-2001
r14525
E142 wafer format
HEL32
MR 4710 IC
300w power amplifier circuit diagram
HEL05
klt22
HEL12 HEL31
HEL16
HLT22
HLT28
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HLT22
Abstract: klt22
Text: MC10ELT22, MC100ELT22 5V Dual TTL to Differential PECL Translator The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL Positive ECL levels are used only +5 V and ground are required. The small outline 8-lead package and the low
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MC10ELT22,
MC100ELT22
MC10ELT/100ELT22
ELT22
HLT22
KLT22
AND8020
AN1404
AN1405
AN1406
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KLT20
Abstract: HLT20 SO-8 HLT20 TSSOP-8 socket ic so8 socket
Text: MC10ELT20, MC100ELT20 5V TTL to Differential PECL Translator The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate of
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MC10ELT20,
MC100ELT20
MC10ELT/100ELT20
ELT20
HLT20
KLT20
MC100ELT20
AN1404
AN1405
HLT20 SO-8
TSSOP-8 socket
ic so8 socket
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Untitled
Abstract: No abstract text available
Text: MC100EL59 5V ECL Triple 2:1 Multiplexer The MC100EL59 is a triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device useful for both data path and random
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MC100EL59
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
AN1568
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KV58
Abstract: No abstract text available
Text: MC100LVEL58 3.3V ECL 2:1 Multiplexer The MC100LVEL58 is a 2:1 multiplexer. The device is pin and functionally equivalent to the EL58 and works from a 3.3 V supply. With AC performance similar to the EL58 device, the LVEL58 is ideal for low voltage applications which require the ultimate in AC
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MC100LVEL58
LVEL58
KVL58
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
KV58
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KVL01
Abstract: No abstract text available
Text: MC100LVEL01 3.3V ECL 4−Input OR/NOR The MC100LVEL01 is a 4−input OR/NOR gate. The device is functionally equivalent to the EL01 device and works from a 3.3 V supply. With AC performance similar to the EL01 device, the LVEL01 is ideal for low voltage applications which require the ultimate in
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MC100LVEL01
LVEL01
KVL01
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
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transistor BD 2420
Abstract: MARKING QB
Text: MC100LVEL12 3.3V ECL Low Impedance Driver The MC100LVEL12 is a low impedance drive buffer. With two pairs of OR/NOR outputs the device is ideally suited for high drive applications such as memory addressing. The device is functionally equivalent to the EL12 device and operates from a 3.3 V power supply.
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MC100LVEL12
LVEL12
KVL12
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
transistor BD 2420
MARKING QB
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Untitled
Abstract: No abstract text available
Text: MC100LVEL59 3.3V ECL Triple 2:1 Multiplexer The MC100LVEL59 is a 3.3 V triple 2:1 multiplexer with differential outputs. The output data of the multiplexers can be controlled individually via the select inputs or as a group via the common select input. The flexible selection scheme makes the device
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MC100LVEL59
100LVEL59
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
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Untitled
Abstract: No abstract text available
Text: NB3N3010B 3.3V, 12.288 MHz Audio Oversampling Clock Generator for USB Applications http://onsemi.com Description MARKING DIAGRAMS* 8 VDD 1 A L Y W M G 4 = Assembly Location = Wafer Lot = Year = Work Week = Date Code = Pb−Free Package Note: Microdot may be in either location
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NB3N3010B
AND8002/D.
506AA
NB3N3010B/D
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marking 802 soic8
Abstract: NB3N3010BDR2G DFN8 2X2
Text: NB3N3010B 3.3V, 12.288 MHz Audio Oversampling Clock Generator for USB Applications http://onsemi.com Description MARKING DIAGRAMS* 8 VDD 1 A L Y W M G 4 = Assembly Location = Wafer Lot = Year = Work Week = Date Code = Pb−Free Package Note: Microdot may be in either location
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NB3N3010B
NB3N3010B/D
marking 802 soic8
NB3N3010BDR2G
DFN8 2X2
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KVT20
Abstract: AN1642
Text: MC100LVELT20 Product Preview 3.3V LVTTL/LVCMOS to Differential LVPECL Translator The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL Positive ECL levels are used, only +3.3 V and ground are required. The small outline SOIC−8 package and the
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MC100LVELT20
KVT20
BRD8011/D.
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1642
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KPT22
Abstract: 100EP EPT22 MC100EPT22 MC100EPT22D MC100EPT22DR2 application note AND8003
Text: MC100EPT22 Dual LVTTL/LVCMOS to Differential LVPECL Translator The MC100EPT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL Positive ECL levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package and the single gate of the EPT22 makes it ideal for those
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MC100EPT22
MC100EPT22
EPT22
420ps
r14153
MC100EPT22/D
KPT22
100EP
MC100EPT22D
MC100EPT22DR2
application note AND8003
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100EL90
Abstract: Application Note AND8002/D
Text: MC100EL90 −3.3V / −5V Triple ECL Input to PECL Output Translator The MC100EL90 is a triple ECL to PECL translator. The device receives either −3.3 V or −5 V differential ECL signals, determined by the VEE supply level, and translates them to standard +5 V differential PECL
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MC100EL90
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
AN1568
100EL90
Application Note AND8002/D
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transistor BD 2420
Abstract: KVL31
Text: MC100LVEL31 3.3V ECL D Flip-Flop with Set and Reset The MC100LVEL31 is a D flip-flop with set and reset. The device is functionally equivalent to the EL31 device but operates from a 3.3 V supply. With propagation delays and output transition times essentially
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MC100LVEL31
LVEL31
AND8020
AN1404
AN1405
AN1406
AN1503
AN1504
AN1560
transistor BD 2420
KVL31
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qn04
Abstract: EP210S MC100EP210S MC100EP210SFA MC100EP210SFAR2 MARKING CODE QA1
Text: MC100EP210S 2.5V 1:5 Dual Differential LVDS Compatible Clock Driver The MC100EP210S is a low skew 1−to−5 dual differential driver, designed with LVDS clock distribution in mind. The LVDS or LVPECL input signals are differential and the signal is fanned out to
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MC100EP210S
EP210S
MC100EP210S
qn04
MC100EP210SFA
MC100EP210SFAR2
MARKING CODE QA1
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KPT21
Abstract: 100EP MC100EPT21 MC100EPT21D MC100EPT21DR2 EPT21
Text: MC100EPT21 Differential LVPECL to LVTTL Translator The MC100EPT21 is a Differential LVPECL to LVTTL translator. Because LVPECL Positive ECL levels are used only +3.3V and ground are required. The small outline 8–lead SOIC package makes the EPT21 ideal for applications which require the translation of a
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MC100EPT21
MC100EPT21
EPT21
275MHz
r14153
MC100EPT21/D
KPT21
100EP
MC100EPT21D
MC100EPT21DR2
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KLT23
Abstract: No abstract text available
Text: MC100ELT23 5 V Dual Differential PECL to TTL Translator The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL Positive ECL levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the
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MC100ELT23
ELT23
MC100ELT23
AN1404
AN1405
AN1406
AN1503
AN1504
KLT23
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KVL58
Abstract: MC100LVEL58 MC100LVEL58D MC100LVEL58DR2
Text: MC100LVEL58 2:1 Multiplexer The MC100LVEL58 is a 2:1 multiplexer. The device is pin and functionally equivalent to the EL58 and works from a –3.3V supply. With AC performance similar to the EL58 device, the LVEL58 is ideal for low voltage applications which require the ultimate in AC
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MC100LVEL58
MC100LVEL58
LVEL58
440ps
AND8003/D
r14525
MC100LVEL58/D
KVL58
MC100LVEL58D
MC100LVEL58DR2
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Untitled
Abstract: No abstract text available
Text: MC100LVEL30 3.3V ECL Triple D Flip−Flop with Set and Reset The MC100LVEL30 is a triple master−slave D flip−flop with differential outputs. Data enters the master latch when the clock input is LOW and transfers to the slave upon a positive transition on the
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MC100LVEL30
BRD8011/D.
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1642/D
AND8001/D
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KPT22
Abstract: C100EPT22
Text: M C 100EP T22 Dual LVTTL/LVCMOS to D ifferen tial LVPECL T ran slator The M C100EPT22 is a dual LVTTL/LVCM OS to differential LVPECL translator. Because LVPECL Positive EC L levels are used only +3.3V and ground are required. The small outline 8-lead SOIC
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100EP
C100EPT22
EPT22
420ps
Ma00-344-3860
r14153
MC100EPT22/D
KPT22
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KPT23
Abstract: No abstract text available
Text: MC100EPT23 Dual Differential LVPECL to LVTTL Translator The M C100EPT23 is a dual differential LVPECL to LVTTL translator. Because LVPECL Positive EC L levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the dual gate design of the EPT23 makes it ideal for
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OCR Scan
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MC100EPT23
C100EPT23
EPT23
Operat0-344-3860
r14153
MC100EPT23/D
KPT23
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