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    ALVCH374 Search Results

    ALVCH374 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    ALVCH374U Renesas Electronics Corporation 3.3V FAST CMOS REGISTER Visit Renesas Electronics Corporation
    74ALVCH374Q8 Renesas Electronics Corporation 3.3V FAST CMOS REGISTER Visit Renesas Electronics Corporation
    74ALVCH374SO Renesas Electronics Corporation 3.3V FAST CMOS REGISTER Visit Renesas Electronics Corporation
    74ALVCH374PY Renesas Electronics Corporation 3.3V FAST CMOS REGISTER Visit Renesas Electronics Corporation
    74ALVCH374PY8 Renesas Electronics Corporation 3.3V FAST CMOS REGISTER Visit Renesas Electronics Corporation
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    ALVCH374 Price and Stock

    Rochester Electronics LLC SN74ALVCH374PWR

    SN74ALVCH374 OCTAL POSITIVE-EDGE
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    DigiKey SN74ALVCH374PWR Bulk 43,000 831
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    Rochester Electronics LLC SN74ALVCH374DW

    SN74ALVCH374 OCTAL POSITIVE-EDGE
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    DigiKey SN74ALVCH374DW Bulk 32,194 831
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    Rochester Electronics LLC SN74ALVCH374PW

    SN74ALVCH374 OCTAL POSITIVE-EDGE
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    DigiKey SN74ALVCH374PW Bulk 13,325 693
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    Rochester Electronics LLC SN74ALVCH374DBR

    IC FF D-TYPE SNGL 8BIT 20SSOP
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    DigiKey SN74ALVCH374DBR Bulk 12,000 579
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    Rochester Electronics LLC SN74ALVCH374DWR

    IC FF D-TYPE SNGL 8BIT 20SOIC
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    DigiKey SN74ALVCH374DWR Bulk 10,000 579
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    Find more ALVCH374 price and stock on Findchips.com

    ALVCH374 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    A115-A

    Abstract: C101 SN74ALVCH374 SN74ALVCH374N
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) A115-A C101 SN74ALVCH374 SN74ALVCH374N

    74LVC05

    Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
    Text: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed


    Original     		PDF 32-bit, compatibilit-7850 74LVC05 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) sdyu001x 2Q2005) sstc001e 74ALVCH374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    A115-A

    Abstract: C101 SN74ALVCH374 SN74ALVCH374N 74ALVCH374
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) A115-A C101 SN74ALVCH374 SN74ALVCH374N 74ALVCH374

    A115-A

    Abstract: C101 SN74ALVCH374 SN74ALVCH374N 74ALVCH374
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) A115-A C101 SN74ALVCH374 SN74ALVCH374N 74ALVCH374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    VB374

    Abstract: A115-A C101 SN74ALVCH374 SN74ALVCH374N
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) VB374 A115-A C101 SN74ALVCH374 SN74ALVCH374N

    IDT74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH374 DESCRIPTION: FEATURES: This octal postive edge-triggered D-type flip-flop is built using advanced


    Original     		PDF IDT74ALVCH374 ALVCH374 IDT74ALVCH374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    A115-A

    Abstract: C101 SN74ALVCH374 SN74ALVCH374N VB374
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCES118F – JULY 1997 – REVISED JANUARY 2003 D D D D D D DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118F 24-mA 000-V A114-A) A115-A) A115-A C101 SN74ALVCH374 SN74ALVCH374N VB374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    74ALVCH374

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A) 74ALVCH374

    Untitled

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: ALVCH374 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCES118G – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DB, DGV, DW, N, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.6 ns at 3.3 V


    Original     		PDF SN74ALVCH374 SCES118G 24-mA 000-V A114-A) A115-A)

    IDT74ALVCH374

    Abstract: DSC 5D
    Text: ALVCH374 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – ALVCH374


    Original     		PDF IDT74ALVCH374 250ps MIL-STD-883, 200pF, 635mm SO20-7) SO20-8) SO20-9) IDT74ALVCH374 DSC 5D

    Untitled

    Abstract: No abstract text available
    Text: OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS DESCRIPTION: FEATURES: - ALVCH374 ADVANCE INFORMATION 0.5 MICRON CMOS Technology Typical ts K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; 25 mil pitch SSOP, QSOP and TSSOP Packages


    OCR Scan     		PDF IDT74ALVCH374 250ps MIL-STD-883, 600mV

    Untitled

    Abstract: No abstract text available
    Text: 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FE A T U R E S : - 0.5 MICRON CMOS Technology - Typical tSK o (Output Skew) < 250ps - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)


    OCR Scan     		PDF 250ps MIL-STD-883, 200pF, 635mm ALVCH374:

    Untitled

    Abstract: No abstract text available
    Text: 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology Typical tS K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)


    OCR Scan     		PDF 250ps MIL-STD-883, 200pF, 635mm ALVCH374 IDT74ALVCH374

    Untitled

    Abstract: No abstract text available
    Text: 3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology Typical tSK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)


    OCR Scan     		PDF 250ps MIL-STD-883, 200pF, 635mm IDT74ALVCH374