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    ALTERA 24PIN DIP Search Results

    ALTERA 24PIN DIP Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    7M2-122 Coilcraft Inc Variable Inductor, 1.1uH Min, 1.3uH Max, Ferrite-Core, Shielded, 3030, DIP-5 Visit Coilcraft Inc
    7M2-272 Coilcraft Inc Variable Inductor, 2.4uH Min, 3uH Max, Ferrite-Core, Shielded, 3030, DIP-5 Visit Coilcraft Inc
    7M2-561 Coilcraft Inc Variable Inductor, 0.526uH Min, 0.594uH Max, Ferrite-Core, Shielded, 3030, DIP-5 Visit Coilcraft Inc
    7M3-103 Coilcraft Inc Variable Inductor, 8uH Min, 12uH Max, Ferrite-Core, Shielded, 3030, DIP-5 Visit Coilcraft Inc
    7M3-182 Coilcraft Inc Variable Inductor, 1.4uH Min, 2.2uH Max, Ferrite-Core, Shielded, 3030, DIP-5 Visit Coilcraft Inc

    ALTERA 24PIN DIP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    PAL16L8 programming specifications

    Abstract: P85C220-10 PAL20L8 programming specifications PAL20L8 Altera EP220 N85C220 PAL16L8 GAL20V8B Intel N85C224 ADS-220
    Text: May 1995, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ General Description Altera Corporation A-ds-220/224-01 EP220 & EP224 Classic EPLDs High-performance, low-power Erasable Programmable Logic Devices EPLDs with 8 macrocells


    Original     		PDF -ds-220/224-01 EP220 EP224 16V8/20V8 EP220, EP224; EP220 PAL16L8 programming specifications P85C220-10 PAL20L8 programming specifications PAL20L8 Altera EP220 N85C220 PAL16L8 GAL20V8B Intel N85C224 ADS-220

    P5AC312-25

    Abstract: D5AC312-25 D5AC312 N5AC324 p5ac312 N5AC312 P5AC312-30 D5AC32430 EP312DC-25 EP312PC-25
    Text: April 1995, ver. 1 Features Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ General Description Altera Corporation A-DS-312/324.01 EP312 & EP324 Classic EPLDs High-performance EPLDs with 12 macrocells EP312 or 24 macrocells (EP324)


    Original     		PDF -DS-312/324 EP312 EP324 EP312) EP324) 20-pin P5AC312-25 D5AC312-25 D5AC312 N5AC324 p5ac312 N5AC312 P5AC312-30 D5AC32430 EP312DC-25 EP312PC-25

    Untitled

    Abstract: No abstract text available
    Text: EP610A EPLD Features □ Advance Information □ □ □ □ General Description Altera's EP610A Erasable Programmable Logic Device EPLD is a high­ speed version of the EP610 EPLD. It offers enhanced performance and is available in reprogrammable plastic 24-pin, 300-mil DIP; 24-pin SOIC; and


    OCR Scan     		PDF EP610A EP610 24-pin, 300-mil 24-pin 28-pin 16-bit

    Untitled

    Abstract: No abstract text available
    Text: EP610 EPLD □ Features □ □ □ □ □ General Description Altera's EP610 Erasable Programmable Logic Device EPLD can implement up to 600 equivalent gates of SSI and MSI logic functions. It is available in space-saving w indowed ceramic or OTP plastic 24-pin, 300-mil DIP and


    OCR Scan     		PDF EP610 24-pin, 300-mil 28-pin 16-bit EP610-25,

    EP610

    Abstract: Altera September 1991 EP610-20 acht30
    Text: altera M7E D corp 05^5375 ODDgPbb T lg W ALT EP610 EPLDs High-Performance 16-Macrocell Devices Data Sheet September 1991, ver. 2 □ □ Features □ □ □ □ □ □ □ □ □ General Description H igh-density replacem ent for TTL and 74HC w ith up to 600 gates


    OCR Scan     		PDF EP610 16-Macrocell EP630-20 EP630-15, EP630-20 EP630 Altera September 1991 EP610-20 acht30

    EPS448

    Abstract: Altera EP1800 altera ep320
    Text: Surface-Mount EPLDs 20 to 28-Lead Package Supplement Data Sheet March 1990 This supplement provides the specifications for Altera's 20-, 24-, and 28-pin plastic surface-mount packaging options. The specifications consist of physical dimensions and thermal characteristics for plastic Small Outline


    OCR Scan     		PDF 28-Lead 28-pin EP330, EP630, EPM5016, EPM5024, EPM5032 300-m EP330 20-pin EPS448 Altera EP1800 altera ep320

    EP610

    Abstract: MIL-STD-883-compliant TI EP610 EP610-15 PALCE610 altera ep610 ALTERA MAX 5000 programming EP610-20 EP610I
    Text: EP610 EPLD Features High-performance, 16-macrocell Classic EPLD Combinatorial speeds with t PD as low as 10 ns Counter frequencies of up to 100 MHz Pipelined data rates of up to 100 MHz Programmable I/O architecture with up to 20 inputs or 16 outputs and 2 Clock pins


    OCR Scan     		PDF EP610 16-macrocell EP610, EP610I, EP610T, MIL-STD-883-compliant, EP600I, PALCE610 24-pin MIL-STD-883-compliant TI EP610 EP610-15 altera ep610 ALTERA MAX 5000 programming EP610-20 EP610I

    EP610

    Abstract: ep600i EP610-30 EP610-35 EP610-25 EP610-15 EP610-20 EP610I
    Text: EP610 EPLD H igh-perform ance, 16-macrocell Classic EPLD Com binatorial speeds with t PD as low as 10 ns Counter frequencies of up to 100 MHz Pipelined data rates of up to 100 MHz Program mable I /O architecture with up to 20 inputs or 16 outputs and 2 Clock pins


    OCR Scan     		PDF EP610 16-macrocell EP610, EP610I, EP610T, IL-STD-883-com EP600I, PALCE610 24-pin ep600i EP610-30 EP610-35 EP610-25 EP610-15 EP610-20 EP610I

    EP610 ORDERING

    Abstract: EP610A EP610-30 EP610-35 EP610-25 EP610 EP610-15 EP610-20 Altera ep330
    Text: □ Features □ □ □ □ □ High-performance, 16-macrocell Classic EPLD Combinatorial speeds with tPD = 15 ns Counter frequencies up to 83 MHz Pipelined data rates up to 83 MHz Programmable I /O architecture with up to 20 inputs or 16 outputs Pin-, function-, and program m ing file-compatible with Altera's


    OCR Scan     		PDF 16-macrocell EP610A, EP610T, EP610 883-compliant 24-pin 28-pin EP610 ORDERING EP610A EP610-30 EP610-35 EP610-25 EP610-15 EP610-20 Altera ep330

    EP610

    Abstract: altera ep610 AX2022 537e EP610-15 EP6101-10 EP610I
    Text: E P 610 E P L D Features High-performance, 16-macrocell Classic EPLD Combinatorial speeds with tPD as low as 10 ns Counter frequencies of up to 100 MHz Pipelined data rates of up to 100 MHz Programmable I/O architecture with up to 20 inputs or 16 outputs and 2 Clock pins


    OCR Scan     		PDF 16-macrocell EP610, EP610I, EP610T, EP610 MIL-STD-883-compliant, EP600I, PALCE610 24-pin 16-bit altera ep610 AX2022 537e EP610-15 EP6101-10 EP610I

    Untitled

    Abstract: No abstract text available
    Text: EP610A EPLD AN b r ^ n ^ \ High-Performance 16-Macrocell Device March 1993, ver. 2 Data Sheet Supplement □ Features □ □ □ P re lim in a ry Inform ation □ □ □ □ □ □ Highest-performance 16-macrocell Classic EPLD Combinatorial speeds with tPD = 10 ns


    OCR Scan     		PDF EP610A 16-Macrocell EP610 EP610T EP610 16-Macrocell

    DATE CODE PAL20L8

    Abstract: PAL20L8 N85C224-66 palce16v8 programming guide PAL20L8 programming specifications
    Text: Features Ge fie ra I . Description Altera Corporation A -ds-220/224-01 High-performance, low-power Erasable Programmable Logic Devices EPLDs w ith 8 macrocells - Combinatorial speeds as low as 7.5 ns - Counter frequencies of up to 100 MHz - Pipelined data rates of up to 115 MHz


    OCR Scan     		PDF 16V8/2QV8 EP220 EP224; EP224 DATE CODE PAL20L8 PAL20L8 N85C224-66 palce16v8 programming guide PAL20L8 programming specifications

    EP610 "pin compatible"

    Abstract: altera ep610
    Text: bflE D ALTERA CORP • GS^S37B G0033S4 b7fl » A L T EP610A E P LD □ Features □ □ □ Preliminary Information □ □ □ Highest-performance, 16-macrocell Classic EPLD Combinatorial speeds with t PD = 7.5 ns Counter frequencies up to 125 MHz Pipelined data rates up to 142.9 MHz


    OCR Scan     		PDF G0033S4 EP610A 16-macrocell EP610, EP610T, EP610 MIL-STD-883-compliant, EP630 24-pin EP610 "pin compatible" altera ep610

    PAL20L8

    Abstract: Altera EP220 EP220LC-12 PAL20L8 programming specifications PAL16L8 programming specifications N85C220 Altera 1995 DATE CODE PAL20L8 EP224LC-7 P85C224-80
    Text: Æ onf^ EP220 & EP224 Classic EPLDs Data Sheet May 1995, ver. 1 Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ General Description High-performance, low-power Erasable Programmable Logic Devices EPLDs w ith 8 macrocells Combinatorial speeds as low as 7.5 ns


    OCR Scan     		PDF EP220 EP224 16V8/20V8 EP220 EP224; D5T5372 PAL20L8 Altera EP220 EP220LC-12 PAL20L8 programming specifications PAL16L8 programming specifications N85C220 Altera 1995 DATE CODE PAL20L8 EP224LC-7 P85C224-80

    EP610 "pin compatible"

    Abstract: altera ep610 1CC3
    Text: Features Preliminary Information □ □ □ □ □ □ □ Highest-performance, 16-macrocell Classic EPLD Combinatorial speeds with tPD = 7.5 ns Counter frequencies up to 125 MHz Pipelined data rates up to 142.9 MHz Fabricated on advanced 0.8-micron CMOS EEPROM technology


    OCR Scan     		PDF 16-macrocell EP610, EP610T, EP610 MIL-STD-883-compliant, EP630 24-pin EP610A EP610 "pin compatible" altera ep610 1CC3

    ep22v10

    Abstract: EP22V10-15
    Text: EP22V10 EPLD F e a tu re s • ■ ■ ■ ■ ■ ■ ■ H igh-perform ance, 10-m acrocell Classic EPLD Com binatorial speeds w ith t P D as low as 7.5 ns Counter frequencies of up to 111.1 MHz Pipelined data rates of up to 109.8 MHz 1.0-m icron CM OS technology w ith EPROM configuration elem ents


    OCR Scan     		PDF EP22V10 22V10 EP22V10E) 24-pin EP22V10-15

    altera ep610

    Abstract: No abstract text available
    Text: □ Features _l □ □ Advance Information J □ □ tPD Altera's EP610A Erasable Programm able Logic Device E P L D is a high­ speed version of the EP610 E P L D . It offers enhanced performance and is available in reprogrammable plastic 24-pin, 300-mil D IP ; 24-pin SO IC ; and


    OCR Scan     		PDF 16-macrocell EP610, EP610T, EP630 24-pin 28-pin 16-bit altera ep610

    02D-00194

    Abstract: No abstract text available
    Text: A N Li □ [í V a\ EPLD Package Outlines ^ is ^ ata s^ eet p ro v id es p ack ag e ou tlin es for all A ltera E P L D s. Table 1 show s the type o f p ack ag es, lead m aterials, and lead fin ish es available. Table 1. EPLD Packages Package Type Package Code


    OCR Scan     		PDF 60/44-Pin 100-Pin 02D-00194

    EP610-XXT

    Abstract: altera ep610 EP610-25t EP610T P610T EP610
    Text: □ Features □ □ □ □ □ High-performance, 16-macrocell Classic EPLD Combinatorial speeds with tPD = 15 ns Counter frequencies up to 83 MHz Pipelined data rates up to 83 MHz Programmable 1/O architecture with up to 20 inputs or 16 outputs Pin-, function-, and programming file-compatible with Altera's EP610,


    OCR Scan     		PDF 16-macrocell EP610, EP610A, EP610 MIL-STD-883-compliant 24-pin 28-pin EP610T EP610-15T EP610-XXT altera ep610 EP610-25t P610T

    cn0316

    Abstract: EP630 altera ep610
    Text: EP630 EPLD □ Features □ □ □ □ □ General Description Altera's EP630 Erasable Programmable Logic Device EPLD is a fast, lowpower version of the EP610 device. The EP630 EPLD can implement a 16-bit counter at up to 83 MHz and typically consumes 5 mA when


    OCR Scan     		PDF EP630 16-macrocell EP610, EP610A, EP610T 24-pin, 300-mil 28-pin cn0316 altera ep610

    EP630

    Abstract: EP630-15 EP630-20 altera ep610 EP610A
    Text: EP630 EPLD □ Features □ □ □ Altera's EP630 Erasable Programmable Logic Device EPLD is a fast, lowpow er version of the EP610 device. The EP630 EPLD can implement a 16-bit counter at up to 83 MHz and typically consumes 5 m A when operating at 1 MHz. The EP630 EPLD is available in OTP plastic 24-pin,


    OCR Scan     		PDF EP630 16-macrocell EP610, EP610A, EP610T 24-pin, 300-mil 28-pin EP630-15 EP630-20 altera ep610 EP610A

    D5AC32430

    Abstract: D5AC312-30 D5AC312
    Text: F e a tu re s G e Pie r a I . D e S C ri p t i o n Altera Corporation A-DS-312/324.01 High-performance EPLDs w ith 12 macrocells EP312 or 24 macrocells (EP324) - Combinatorial speeds as fast as 25 ns - Counter frequencies of up to 33.3 MHz - Pipelined data rates of up to 66 MHz


    OCR Scan     		PDF EP312) EP324) 20-pin EP312 D5AC32430 D5AC312-30 D5AC312

    EP610

    Abstract: AX2022 EP610-30 EP610-25 EP610-35 EP610-15 EP610-20
    Text: □ Features □ □ □ □ □ High-performance, 16-macrocell Classic EPLD Combinatorial speeds with tPD = 15 ns Counter frequencies up to 83 MHz Pipelined data rates up to 83 MHz Programmable I/O architecture with up to 20 inputs or 16 outputs Pin-, function-, and programming file-compatible with Altera's


    OCR Scan     		PDF 16-macrocell EP610A, EP610T, EP610 MIL-STD-883-compliant 24-pin 28-pin EP610-15, EP610-20, AX2022 EP610-30 EP610-25 EP610-35 EP610-15 EP610-20

    Untitled

    Abstract: No abstract text available
    Text: EP600 EPLD t i d = n & 16-Macrocell Device \ June 1993, ver. 1 Data Sheet Supplement 16-macrocell Classic EPLD - Combinatorial speeds with tPD = 45 ns Counter frequencies up to 222 MHz Pipelined data rates up to 263 MHz □ Programmable I/O architecture with up to 20 inputs or 16 outputs


    OCR Scan     		PDF EP600 16-Macrocell EP610, EP610A, EP610T, EP630