35x35 bga
Abstract: No abstract text available
Text: 352-PIN PLASTIC BGA 35x35 A S B C Index mark 25 23 21 19 17 15 13 11 9 7 5 3 1 D 26 24 22 20 18 16 14 12 10 8 6 4 2 AE AC AA W U R N L J G E C A AF AD AB Y V Y P M K H F D B P J I R H L K S φM M F E S G NOTE Each ball centerline is located within φ 0.30 mm of
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352-PIN
35x35)
P352S1-127-F6-1
35x35 bga
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P132-P134
Abstract: p331 TRANSISTOR P452
Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor
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aw7 TRANSISTOR
Abstract: P449 I-CUBE iq P-033 Bus repeater p426 P-238 P122-P120 p331 TRANSISTOR P339
Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor
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j29 p190
Abstract: IR P317 p331 TRANSISTOR IR p133 IR p011 MSX532TB792 p308 m29u1 IR P317 t RCA 532
Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor
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J29 P190
Abstract: p331 TRANSISTOR p477 p525 P364 P521 G P440 C 05 P521 G2 p372 transistor P519
Text: MSX Family Data Sheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor
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P521 FAIRCHILD
Abstract: J29 P190 P211A11 fairchild AG12 diode fairchild Ah7 FAIRCHILD AB29 transistor P421 fairchild AJ23 P449 P315 transistor
Text: MSX Family Datasheet Features • SRAM-based, in-system programmable • Configurable I/O Ports – Individually programmable as input, output, bi-directional, or Bus Repeater mode – Control Signals per I/O port: 2 input enables, 2 output enables, 2 Global Clock inputs and Next Neighbor
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CY37064P44-154YMB
Abstract: CY37512P208-100UMB CY37256P160-125UMB CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37032VP44-100AI
Text: Family Ultra37000 CPLD Family[1] 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
CY37064P44-154YMB
CY37512P208-100UMB
CY37256P160-125UMB
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37128V
CY37032VP44-100AI
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CY37032VP44-100AI
Abstract: CY37512P208-100UM CY37512P208-100UMB CY37064P44-154YMB
Text: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
CY37032VP44-100AI
CY37512P208-100UM
CY37512P208-100UMB
CY37064P44-154YMB
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ic 313
Abstract: S3043 S3044
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4 Gbps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a transmission function for mapping an ATM cell passed from a high-end ATM layer
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PD98414
NEASCOT-P70)
STS-48c/SDH
STM-16c
ic 313
S3043
S3044
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transistor P397
Abstract: transistor P479 P449 p331 TRANSISTOR transistor k38 v6 transistor P519 am2 am3 p055 power transistor f AJ38 w38 transistor
Text: MSX532 Matrix Switch Preliminary Data Sheet Features Description • • The MSX family of SRAM-based bit-oriented switching devices offers flow-through NRZ datarates of 300Mbps and registered clock frequencies of 200MHz. The 532 I/O Buffers IOBs are individually configured. The IOBs can be connected
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MSX532
200MHz
300Mbps
MKT-MSX532-DS
transistor P397
transistor P479
P449
p331 TRANSISTOR
transistor k38 v6
transistor P519
am2 am3
p055 power transistor
f AJ38
w38 transistor
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Untitled
Abstract: No abstract text available
Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4 Gbps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum. Its main functions include a transmission function for mapping an ATM cell passed from a high-end ATM layer
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PD98414
NEASCOT-P70ï
STS-48c/SDH
STM-16c
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ic 313
Abstract: AC03 nec S3043 S3044 STM-16 A09 N03 IR202
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT µPD98414 2.4G bps ATM SONET FRAMER The µPD98414 NEASCOT-P70 is one of ATM LSIs and provides the functions of the TC sublayer of the SONET/SDH-base physical layer of the ATM protocol specified by the ATM Forum.
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PD98414
NEASCOT-P70TM)
OC-48c/SDH
STM-16
ic 313
AC03 nec
S3043
S3044
A09 N03
IR202
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CY37512P208-100UMB
Abstract: CY37512P208-100UM CY37032VP44-100AI CY37256P160-83UM CY37064P44-154YMB CY37256P160-125UMB CERAMIC leaded CHIP CARRIER CLCC 68
Text: Family PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
222-MHz
CY37512P208-100UMB
CY37512P208-100UM
CY37032VP44-100AI
CY37256P160-83UM
CY37064P44-154YMB
CY37256P160-125UMB
CERAMIC leaded CHIP CARRIER CLCC 68
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5962-9951902QYA
Abstract: CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37192 CY37256 CY37384
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes
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Ultra37000
CY37128V
BB100
5962-9951902QYA
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37192
CY37256
CY37384
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5962-9951902QYA
Abstract: CY37128P100-125AXC U208 5962-9952301QZC CERAMIC LEADLESS CHIP CARRIER CY37032P44-125JXC CY37512P256-100BGI CY37192 CY37256 CY37384
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes
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Ultra37000
CY37128P160-100AXC,
CY37128P100-100AXI,
CY37192P160-154AXC,
CY37192P160-125AXC,
CY37192P160-125AXI,
CY37192P160-83AXC,
CY37192P160-83AXI,
CY37256P160-154AXC,
CY37256P160-125AXC,
5962-9951902QYA
CY37128P100-125AXC
U208
5962-9952301QZC
CERAMIC LEADLESS CHIP CARRIER
CY37032P44-125JXC
CY37512P256-100BGI
CY37192
CY37256
CY37384
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CY37032VP44-100AI
Abstract: 5962-9952502QZC 400BA
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000
CY37032VP44-100AI
5962-9952502QZC
400BA
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CY37032VP44-100AI
Abstract: CY37064P44-154YMB
Text: Family PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
222-MHz
84-Pin
1-80095-A
CY37032VP44-100AI
CY37064P44-154YMB
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CY37032VP44-100AI
Abstract: No abstract text available
Text: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
CY37032VP44-100AI
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CY37032
Abstract: CY37032V CY37064 CY37064V CY37128 CY37128V CY37192 CY37256 CY37384 CY37512
Text: 1Ultra37000 Features Family Ultra37000: December 13, 1996 Revision: March 15, 2001 Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability
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1Ultra37000
Ultra37000:
Ultra37000TM
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37128V
CY37192
CY37256
CY37384
CY37512
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CY37032
Abstract: CY37032V CY37064 CY37064V CY37128 CY37128V CY37192 CY37256 CY37384 CY37512
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes
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Ultra37000TM
1-85049-A
160-Lead
208-Lead
51-85069-B
1-85108-A
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37128V
CY37192
CY37256
CY37384
CY37512
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CY37064
Abstract: ULTRA37000 CY37032 CY37032V CY37064V CY37128 CY37128V CY37192 CY37256 CY37384
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes
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Ultra37000
CY37128V
BB100
CY37032VP44-143JC
CY37032VP44-100JC
CY37032VP44-100JI
CY37064VP44-143JC
CY37064VP84-143JC
CY37064VP44-100JC
CY37064VP84-100JC
CY37064
CY37032
CY37032V
CY37064V
CY37128
CY37192
CY37256
CY37384
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CY37032P44-154AXI
Abstract: CY37128P160-125AC 5962-9951902QYA CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37192
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes
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Ultra37000
proY37192P160-83AXI,
CY37256P160-154AXC,
CY37256P160-125AXC,
CY37256P160-125AXI,
CY37256P160-83AXC,
CY37256P160-83AXI,
CY37032VP44-143AXC,
CY37032VP44-100AXC,
CY37032VP44-100AXI,
CY37032P44-154AXI
CY37128P160-125AC
5962-9951902QYA
CY37032
CY37032V
CY37064
CY37064V
CY37128
CY37128V
CY37192
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CY37032VP44-100AI
Abstract: CY37128P100-125AXC
Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes
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Ultra37000
CY37192P160-154AXC,
CY37192P160-125AXC,
CY37192P160-125AXI,
CY37192P160-83AXC,
CY37192P160-83AXI,
CY37256P160-154AXC,
CY37256P160-125AXC,
CY37256P160-125AXI,
CY37256P160-83AXC,
CY37032VP44-100AI
CY37128P100-125AXC
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D78352
Abstract: uPD78352 78352 UPD78P352 uPD78350 D7835
Text: N E C ELECTRONICS INC b7E » NEC Electronics Inc. • b4 2 7S 2 S 003^21,5 T7b « N E C E JUPD78352 Family HIPD78350/352A/P352 16-/8-Bit, K-Series Microcontrollers With Real-Time Output Ports September 1993 Description The juPD78350, pPD78352A, and ¿/PD78P352 are mem
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uPD78352
uPD78350
uPD78352A
uPD78P352
16-/8-Bit,
juPD78350
pPD78352A,
/PD78P352
16-/8bit
JPD78350
D78352
78352
D7835
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