CG624
Abstract: SK-AX1-AX2-KITTOP AX1000-CG624 RTAX2000 RTAX1000SL-CG624 CCGA AX2000-CG624 FG484 SK-AX2-CG624-KITBTM RTAX2000S
Text: Application Note AC275 CCGA to FBGA Adapter Sockets Introduction Actel recently introduced RTAX-S/L, the next generation designed-for-space antifuse Field Programmable Gate Arrays FPGAs . RTAX-S/L, with up to four million system gates, is Actel's highest density family,
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AC275
CG624
SK-AX1-AX2-KITTOP
AX1000-CG624
RTAX2000
RTAX1000SL-CG624
CCGA
AX2000-CG624
FG484
SK-AX2-CG624-KITBTM
RTAX2000S
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actel FG484 package mechanical drawing
Abstract: RTAX2000S-CQ352 actel package mechanical drawing FG484 CQ352 2-CQFP SK-AX2000-CQ352RTFG896 sk-ax FG896 rtax2000* cqfp
Text: &4 3 WR )%*$ $GDSWHU 6RFNHWV July 2004 Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 CQFP to FBGA Adapter Socket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
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CQ352
FG484
actel FG484 package mechanical drawing
RTAX2000S-CQ352
actel package mechanical drawing
2-CQFP
SK-AX2000-CQ352RTFG896
sk-ax
FG896
rtax2000* cqfp
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RTAX2000S-CQ352
Abstract: RTAX2000S RTAX2000S-CQ256 RTAX2000 SK-AX2-CQ256-KITBTM RTAX2000SL-1 SK-AX2000-CQ352RTFG896 CQ352 RTAX1000S-CQ352 FG896
Text: Application Note AC274 CQFP to FBGA Adapter Sockets Introduction RTAX-S/SL is Actel's next generation, designed-for-space, metal-to-metal, antifuse field programmable gate array FPGA family. The RTAX-S/SL is a derivative of the Axcelerator family with up to two million-system gates. The FPGA provides the designer with nearly 250K ASIC gates,
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AC274
RTAX2000S-CQ352
RTAX2000S
RTAX2000S-CQ256
RTAX2000
SK-AX2-CQ256-KITBTM
RTAX2000SL-1
SK-AX2000-CQ352RTFG896
CQ352
RTAX1000S-CQ352
FG896
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Yamaichi IC51-1444-1354-7 footprint
Abstract: IC149-208-161-S5 BPW32 Enplas drawings BPW896-1030-30AB01L IC51-1764-1505-5 IC51-1004-809 SY-PQ240 enplas FPQ-256
Text: v3.1 Socket Recommendation for Actel FPGA Packages Sockets for Prototyping with Actel FPGAs Actel offers a range of surface-mount sockets to make it easier for designers to prototype designs using Actel one-time-programmable FPGAs. These sockets have been manufactured for Actel by some of
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piec-256
FPQ-256
Yamaichi IC51-1444-1354-7 footprint
IC149-208-161-S5
BPW32
Enplas drawings
BPW896-1030-30AB01L
IC51-1764-1505-5
IC51-1004-809
SY-PQ240
enplas
FPQ-256
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FPQ-256(352)-0.5-04
Abstract: ic149-208-161-s5 FPQ-256 Enplas drawings IC51-1004-809 Enplas fpq 352 Yamaichi TQFP Enplas fpq IC51-1764-1505-5 IC51-1444-1354
Text: v2.0 Socket Recommendation for Actel FPGA Packages So c ke t s f or Pr o t o t yp i n g w i t h Ac t e l F P G A s Actel offers a range of surface-mount sockets to make it easier for designers to prototype designs using Actel one-time-programmable FPGAs. These sockets have been manufactured for Actel by some of
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IC51-1964-1952
FPQ-256
FPQ-256(352)-0.5-04
ic149-208-161-s5
Enplas drawings
IC51-1004-809
Enplas fpq 352
Yamaichi TQFP
Enplas fpq
IC51-1764-1505-5
IC51-1444-1354
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CQ352
Abstract: AC342 RTAX-S SK-RT4K-KITTOP RTAX4000S ACTEL FBGA PACKAGE DRAWING
Text: Application Note AC342 CQFP to CLGA Adapter Socket Introduction RTAX-S/L is Actel's next generation, designed-for-space, metal-to-metal antifuse field programmable gate array FPGA family. RTAX-S/L is a derivative of the Axcelerator family with up to two million-system gates. RTAX-S/L FPGAs provide the designer with nearly 500K ASIC gates,
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AC342
CQ352
AC342
RTAX-S
SK-RT4K-KITTOP
RTAX4000S
ACTEL FBGA PACKAGE DRAWING
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ms-029
Abstract: FBGA1152
Text: v6.0 Package Characteristics and Mechanical Drawings P a ck ag e Th e r m al C h ar ac te ri st i cs Package Type Ceramic Pin Grid Array CPGA Ceramic Quad Flat Pack (CQFP) – cavity up – cavity up w/ heat sink Plastic Leaded Chip Carrier (PLCC) Plastic Quad Flat Pack (PQFP)
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Theta JC of FBGA
Abstract: cpga dimensions cpga weight 84 pin plcc ic base
Text: v3.0 Package Characteristics and Mechanical Drawings Pa c ka ge T he r m a l C ha r a ct e r i s t i c s Package Type Ceramic Pin Grid Array CPGA Ceramic Quad Flat Pack (CQFP) – cavity up – cavity up w/ heat sink Plastic Leaded Chip Carrier (PLCC) Plastic Quad Flat Pack (PQFP)
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ACTEL CCGA 1152 mechanical
Abstract: CS180 antifuse AX125 AX2000 CQ208 CQ256 FG256 PQ208 ACTEL CCGA 624 mechanical
Text: v2.8 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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Untitled
Abstract: No abstract text available
Text: v2.6 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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Untitled
Abstract: No abstract text available
Text: v2.5 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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ACTEL CCGA 624 mechanical
Abstract: ACTEL CCGA 1152 mechanical AX125 AX2000 CQ208 CS180 FG256 PQ208 CQ352 AX1000
Text: v2.7 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates
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AGL400
Abstract: TOP MARK E6 T7IO192NPB3
Text: IGLOO Packaging 3 – Package Pin Assignments 81-Pin µCSP A1 Ball Pad Corner 9 8 7 6 5 4 3 2 1 A B C D E F G H J Note: This is the bottom view of the package. Note For Package Manufacturing and Environmental information, visit the Resource Center at .
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81-Pin
AGL030
IO00RSB0
GEB0/IO71RSB1
IO63RSB1
AGL400
TOP MARK E6
T7IO192NPB3
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QFN108
Abstract: QFN-132 kl1-v1 208 pin rqfp drawing qfn132 RT3PE3000L CQ256 DIMENSIONS pqfp 100 actel package mechanical drawing Actel A40MX04 PBGA 23X23 0.8 pitch
Text: v 11. 2 Package Mechanical Drawings Ceramic Pin Grid Array 84-Pin CPGA Top View 0.050" ± 0.010" Pin #1 ID 0.045" 0.055" 0.015" 0.018" ± 0.002" 0.100" BSC 1.100" ± 0.020" square 0.072" 0.088" L 0.120" 0.140" Side View K J H G F 1.000" BSC E D C B A 1 2 3
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84-Pin
A1010B
A1020B
100-Pin
QFN108
QFN-132
kl1-v1
208 pin rqfp drawing
qfn132
RT3PE3000L CQ256
DIMENSIONS pqfp 100
actel package mechanical drawing
Actel A40MX04
PBGA 23X23 0.8 pitch
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0603B104K160BT
Abstract: IO15NDB0V1 a3p400 JESD79C FP3-26PIN-ADAPTER A500K270 Resistor Capacitor Catalog 2008
Text: ProASIC 3E Handbook ProASIC3E Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – ProASIC®3E Datasheet ProASIC®3E Flash Family FPGAs with Optional Soft ARM®Support . . . . . . . . . . . . . . . . . . . . . . . 1-1
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IO118VDB3
Abstract: AGL015
Text: v1.4 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and
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130-nm,
IO118VDB3
AGL015
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ProASIC PLUS v0.1
Abstract: AGL015
Text: v1.2 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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AGL250
ProASIC PLUS v0.1
AGL015
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AGL015
Abstract: AGL400 FG144 QN132 VQ100 ProASIC3
Text: v1.5 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and
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AGL250
JESD8-12,
AGL015
AGL400
FG144
QN132
VQ100
ProASIC3
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BB 209
Abstract: AGL015
Text: v1.4 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V / 1.2 V, 3.3 V PCI / 3.3 V PCI-X†, and
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BB 209
AGL015
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RTSX32SU CQ84
Abstract: RT3PE3000L CQ256 CQFP 256 PIN actel A54SX32A SEU RT3PE600L Cqfp256 RTAX2000 ACTEL CCGA 624 mechanical rtax2000sl aircraft logic gates
Text: System-Critical FPGAs Product Catalog November 2009 Taking Designs from Earth to Outer Space Whether you’re designing for sea-level or 2,000,000 miles into space, Actel’s high-reliability, low-power FPGAs are your best choice. With a history of providing the most reliable, robust, low-power flash and antifuse-based FPGAs in
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AGL400
Abstract: FG144 QN132 VQ100 AGL060 AGL015
Text: v1.3 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O • • • • Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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AGL250
AGL400
FG144
QN132
VQ100
AGL060
AGL015
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Datasheet AGLN020
Abstract: FG144 QN132 VQ100 IO45PDB1 AGL015
Text: v2.0 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits • 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation • Bank-Selectable I/O Voltages—up to 4 Banks per Chip • Single-Ended I/O Standards: LVTTL, LVCMOS
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AGL250
JESD8-12,
Datasheet AGLN020
FG144
QN132
VQ100
IO45PDB1
AGL015
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Untitled
Abstract: No abstract text available
Text: v1.0 IGLOO Low-Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Advanced I/O Low Power • • • • • 1.2 V or 1.5 V Core and I/O Voltage for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode
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AGL250
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A3P3000
Abstract: HEADER-CONVERTER
Text: ProASIC 3L Low-Power Handbook ProASIC3L Low-Power Flash Device Handbook Table of Contents Low-Power Flash Device Handbooks Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Section I – ProASICL Low-Power Datasheet
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