s8143
Abstract: e hall S-8143A S8143A S-814
Text: SEI KO I NSTRUMENTS U S A 3 1E » • A1234M3 OOOimt, 7 M S E IJ T 'l^ S 'O _ S ._ S-8143A CMOS HIGH SENSITIVE HALL IC The S-8143A is a Hall IC that uses the CM O S process. It features low supply voltage, low current consumption, and
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A1234M3
S-8143A
S-8143A
s8143
e hall
S8143A
S-814
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3.579545 MHz oscillator
Abstract: S7241
Text: S-7241 Series PULSE/DTMF SWITCHABLE REPERTORY DIALER The S-7241 Series is a CM OS dialer, which generates signals required for DTM F/PULSE dialing. It has a 20number x 16-digit repertory memory and 32-digit redial memory, so one-touch dialing and abbreviated dialing are
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S-7241
20number
16-digit
32-digit
579545-MHz
20-number
16-digit
15-digit
32-digit
3.579545 MHz oscillator
S7241
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MC93C66
Abstract: No abstract text available
Text: S-2934AR/I C M O S 4 K -bit serial E ’ PROM Com patible with N M C93C 66, NS code The S-2934AR/I is a high speed, low power 4K-bit E2PROM that u ses the CM O S floating-gate p rocess. T he organization is 256-word x 16-bit, and it is read or written serially.
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S-2934AR/I
S-2934AR/I
256-word
16-bit,
NMC93C66
0G021S4
MC93C66
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Untitled
Abstract: No abstract text available
Text: S -29801 CMOS 768-bit bit sequential E2PROM T h e S-29801 is a 7 68 -b it sequential E 2 P R 0 M with internal address counter. A ddress input is the sequential increm ent system by CLK pin, and output is serial. C urrent consum ption is greatly red uced by
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768-bit
S-29801
MB8541
00225b
D002257
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uPD75X
Abstract: upd75xx
Text: S-24H30R/I 8-wordX 8-bit Serial NON-VOLATILE RAM T h e S -2 4 H 3 0 R /I is a non-volatile C M O S R A M , com po sed of a C M O S static R A M and a non-volatile electrically erasab le p ro gram m able m em ory E 2P R O M to backup the S R A M . T h e organization is 8-word x 8bit (total 6 4 bits) and data can be transferred serially by
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S-24H30R/I
00D17flfl
uPD75X
upd75xx
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ma 8420
Abstract: No abstract text available
Text: S-8420 Series BATTERY BACKUP 1C FOR 1-CHIP CPU The S-8420 Series is a CMOS IC designed for use in the switching circuits of main and backup power supplies. It consists of a voltage regulator, three voltage detectors, a power alteration switch, and a control circuit.
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S-8420
A123443
0005b73
A153443
DDDSb74
ma 8420
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S7235B2
Abstract: S7235A2
Text: S-7235 Series PULSE/DTMF SWITCHABLE DIALER The S -7235 Series is a CM OS DTM F/PULSE switchable dialer, which has a 32-digit redial memory. Input is m ade from keyboard or CPU. Features • Functions Flash • Operating supply voltage PULSE mode: 1.5 V to 5.5 V
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S-7235
32-digit
A1234M3
QDD2777
G00277A
S7235B2
S7235A2
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Q002
Abstract: NMC93C66 S-2934A S-2934AI S-2934AR
Text: S-2934AR/I C M O S 4 K -bit serial E ’ PROM Com patible with N M C93C 66, NS code The S-2934AR/I is a high speed, low power 4K-bit E2PROM that u ses the CM O S floating-gate p rocess. T he organization is 256-word x 16-bit, and it is read or written serially.
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S-2934AR/I
NMC93C66,
S-2934AR/I
256-word
16-bit,
NMC93C66
000215M
A123443
Q002
NMC93C66
S-2934A
S-2934AI
S-2934AR
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CSSK
Abstract: S-2961I
Text: S -29611 C M O S 3 8 4 - b it se ria l E 2P R O M E a s y in te rfa c e w ith se r ia l port W ith m e m o r y p ro te ctio n The S-29611 is a high speed, low power 384-bit E 2 P R 0 M that uses the C M O S floating-gate process. The organization is 48-word x 8-bit, and it is read or
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S-29611
384-bit
48-word
S-29611
CSSK
S-2961I
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RX 150 batch counter
Abstract: S-2100R S-7035C2F
Text: S-7035C2F PAGING DECORDER IC POCSAG The S-7035C2F is a signal processor 1C that uses the format of ’’Standard Code and Format International Radio Paging” (POCSAG) of the CCIR suggestion 584. It processes POCSAG format signals by itself, and transfers data to a CPU.
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S-7035C2F
S-7035C2F
S-2100R
S-29801
D002flbb
RX 150 batch counter
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S-2913CIF10
Abstract: S2913CIF10 s2913cr
Text: S-2913CR/I CMOS 1K-bit serial E2PROM With memory protection, NS code T h e S -2 9 1 3 C R /I is a h igh s p e e d , low p o w e r 1 K -bit E 2P R O M th a t u s e s th e C M O S flo a tin g -g a te p ro c e s s . T h e o rg a n iz a tio n is 6 4 -w o rd x 1 6 -b it, a nd it is re a d or
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S-2913CR/I
S-2913CR/I
64-word
16-bit,
S-2913CIF10
S2913CIF10
s2913cr
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S2919AIF10
Abstract: S-2919aif10 seiko 64 s chip
Text: S-2919AR/I C M O S 1 K -b it s e r ia l E P R O M E a s y in terfa ce with se ria l port T h e S -2919A R /I is a high sp e e d , low pow er 1 K-bit E2 P R O M that u s e s the C M O S floating-gate p ro c e s s. T h e organization is 64-word x 16-bit, and it is read or
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S-2919AR/I
-2919A
64-word
16-bit,
A123443
81234M3
S2919AIF10
S-2919aif10
seiko 64 s chip
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Untitled
Abstract: No abstract text available
Text: S-2923CR/I C M O S 2 K - b it s e ria l E 2P R O M W ith m e m o ry p ro te c tio n C o n fo rm in g to N S c o d e The S-2923CR/I is a high speed, low power 2K-bit E2PR0M that uses the CMOS floating-gate process. The organization is 128-word x 16-bit, and it is read or
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S-2923CR/I
S-2923CR/I
128-word
16-bit,
A123M43
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