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    ZX74HC Price and Stock

    Zytrex Corporation ZX74HCT86-2N

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    Bristol Electronics ZX74HCT86-2N 675 6
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    Zytrex Corporation ZX74HCT366-2N

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    Bristol Electronics ZX74HCT366-2N 125
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    Zytrex Corporation ZX74HCT373-2N

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    Bristol Electronics ZX74HCT373-2N 22
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    Zytrex Corporation ZX74HCT022N

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    Bristol Electronics ZX74HCT022N 19
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    Zytrex Corporation ZX74HCTLS157N

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    Bristol Electronics ZX74HCTLS157N 18
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    ZX74HC Datasheets (164)

    Part ECAD Model Manufacturer Description Curated Type PDF
    ZX74HCT210J-1 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCT210J-2 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCT210N-1 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCT210N-2 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCT241J-1 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCT241J-2 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCT241N-1 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCT241N-2 Zytrex Octal Buffers with 3-State Outputs Scan PDF
    ZX74HCTLS00J Zytrex Quad 2-input NAND Gates Scan PDF
    ZX74HCTLS00N Zytrex Quad 2-input NAND Gates Scan PDF
    ZX74HCTLS01J Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF
    ZX74HCTLS01N Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF
    ZX74HCTLS02J Zytrex Quad 2-input NOR Gates Scan PDF
    ZX74HCTLS02N Zytrex Quad 2-input NOR Gates Scan PDF
    ZX74HCTLS03J Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF
    ZX74HCTLS03N Zytrex Quad 2-input NAND Gates with Open-Drain Outputs Scan PDF
    ZX74HCTLS04J Zytrex Hex Inverters Scan PDF
    ZX74HCTLS04N Zytrex Hex Inverters Scan PDF
    ZX74HCTLS05J Zytrex Hex Inverters with Open-Drain Outputs Scan PDF
    ZX74HCTLS05N Zytrex Hex Inverters with Open-Drain Outputs Scan PDF
    ...

    ZX74HC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74HCTLS

    Abstract: el 519
    Text: Zyfi vx ZXS4HCTLS Ë U ZX74HCTLS Ê February 1985 T r ip le 3 -In p u t N A N D E G a te ^ OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain three independent 3-input NAND


    OCR Scan     		PDF ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS el 519

    74HCTLS

    Abstract: No abstract text available
    Text: Zvtrex ZX54HCTLS ZX74HCTLS February 1985 78A Dual J-K Flip-Flops with Preset, Common Clear & Common Clock O B J E C T IV E SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These parts consist of two oegatjye-edge-triggered J-K


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS

    74HCTLS

    Abstract: No abstract text available
    Text: Z y tr e x ZX54HCTLS M ZX74HCTLS M February 1985 M Hex Schmitt-Trigger Inverters OBJECTIVE SPECIFICATIONS Features Description • Function, pln-out, speed and drive compatibility with 54/74LS logic family These Schm itt-trigger devices contain six independent


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS

    74hctls

    Abstract: No abstract text available
    Text: Zytrex ZX54HCTLS ZX74HCTLS no f M^ Quad 2-Input NOR Gates February 1905 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These d e vice s con tain fo u r in d e p e n d e n t 2 -in put N O R


    OCR Scan     		PDF 54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74hctls

    74hctls

    Abstract: No abstract text available
    Text: Zytrex ZX54HCTLS ZX74HCTLS 73A Dual J-K Negative-Edge-Triggered Flip-Flops with Clear Februa ry 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain two independent J-K negativeedge-triggered flip-flops. A low level at the CLR input


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74hctls

    Zytrex

    Abstract: LS-210 ls210 1984 74ALS 74LS
    Text: s - A ’y O d ^f « » 8 7 9 v 27X =nP 7 1 ZYTREX u ZX74HCT/LS210 ZX74HCT/LS241 Octal Buffers with 3-State Outputs January 1984 Preliminary Features • B ip o la r F a s t: 11n s m a x p ro p a g a tio n d e la y • F u ll T T L c o m p a tib ility as w e ll a s C M O S in p u t


    OCR Scan     		PDF ZX74HCT/LS210 ZX74HCT/LS241 ZX74HCT/LS210 ZX74HCT/LS241 20-Lead Zytrex LS-210 ls210 1984 74ALS 74LS

    74HCTLS

    Abstract: 54HCTLS
    Text: 365A/367A %%%%366A /368A ZXS4HCTLS ZX74HC TLS 1 Hex Bus-Drivers with 3-State Outputs February 1985 O B JE C TIV E S P E C IF IC A T IO N S Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These high-speed Hex bus drivers are designed specifi­


    OCR Scan     		PDF ZyttGX365A/367A 66A/368A ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS 54HCTLS

    74HCTLS

    Abstract: No abstract text available
    Text: Zytrex ZX54HCTLS ZX74HCTLS February 1985 273 Octal D-Type Flip-Flops with Clear OBJECTIVE SPECIFICATIONS Features Description • Eight positive-edge-triggered D-type flipflops with single-rail outputs these devices are high-speed octal registers. They con­


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS

    74LS TTL 245

    Abstract: 74HCTLS 74hctl PPT Diode specifications
    Text: Zytrex ZX54HCTLS ZX74HCTLS February 1985 245 Octal Bus Transceivers with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These high-speed octal bus transceivers are designed


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74LS TTL 245 74HCTLS 74hctl PPT Diode specifications

    74HCTLS

    Abstract: No abstract text available
    Text: Zvtrex ZX54HCTLS ZX74HCTLS 138 3-Line to 8-Line Decoders/Multiplexers February 1985 OBJECTIVE SPECIFICATIONS Features Description m Designed specifically for high-speed memory These devices are designed to be used in high-perform ­ ance m em ory-decoding or data-routing applications re­


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74hctls 54HCTLS

    74HCTLS

    Abstract: diode S4 596
    Text: Zytrex ZX54HCTLS ZX74HCTLS February 1985 191 Synchronous 4-Bit Up/Down Binary Counters OBJECTIVE SPECIFICATIONS Features tion e lim in ates the o u tp u t co u n tin g s p ike s no rm a lly a s s o ­ ciate d w ith a syn ch ro n o u s rip ple clo ck cou nters.


    OCR Scan     		PDF ZX74HCTLS S4/74LS 74HCTLS: 54HCTLS: 74HCTLS diode S4 596

    74HCTLS

    Abstract: and cmos Zytrex
    Text: Zvtrex ZX54HCTLS Æ ZX74HCTLS F e b ru a ry 1985 i S m^ Dual Retriggerable Monostable Multivibrator OBJECTIVE SPECIFICATIONS Features Description • Simple pulse width formula T = RC The '423 contains two retriggerable monostable multivi­ brators that feature both a negative, A, and a positive, B,


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS and cmos Zytrex

    HCTLS

    Abstract: 74hctls
    Text: Z v t n ZX54HCTLS M ZX74HCTLS x February 1985 Quad 2-Input AND Gates with Open-Drain Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent 2-Input AND


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: HCTLS 74hctls

    74hctls

    Abstract: No abstract text available
    Text: Zvtrex ZXS4HCTLS ZX74HCTLS 257 %æ&258 Quad 2-Line to 1-Line Data Selector/ Multiplexers with 3-State Outputs February 1985 OBJECTIVE SPECIFICATIONS Description Features The '257 and ’258 multiplex signals from four-bit data sources to four-output data lines in bus organized sys­


    OCR Scan     		PDF ZX74HCTLS ss258 S4/74LS 74HCTLS: 54HCTLS: sys16 74hctls

    K413

    Abstract: 74HCTLS Zytrex 161
    Text: # MJ Lmm ZXS4HCTLS § ZX74HCTLS M Februa,y1985 t ZX54HCTLS ZX74HCTLS M Ë m a Ê WÂ À t m Synchronous 4-Bit Binary Counters O B JE C T IV E S P E C IF IC A T IO N S ' * Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: K413 74HCTLS Zytrex 161

    hctls299

    Abstract: 74HCTLS
    Text: Zytrex ZXS4HCTLS ZX74HCTLS February 1985 8-Bit Universal Shift/Storage Registers with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • Multiplexed I/O ports provides improved bit density These eight-bit universal registers feature multiplexed


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS hctls299 74HCTLS

    74HCTLS

    Abstract: No abstract text available
    Text: Z v tre x ZX54HCTLS § ZX74HCTLS M 8-Bit Parallel-ln/Serial-Out Shift Registers with Clear February 1985 OBJECTIVE SPECIFICATIONS Features Description • Synchronous load These devices feature parallel-in or serial-in, serial-out registers, gated clock inputs and an overriding clear in­


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS

    74hctls

    Abstract: Zytrex OR gate
    Text: Z v t r e ZXS4HCTLS ZX74HCTLS x _ K A Quad 2-Input OR Gates February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, ptn-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent 2-input OR gates. They perform the Boolean functions Y = A + B


    OCR Scan     		PDF 54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74hctls Zytrex OR gate

    74HCTLS

    Abstract: diode sy 171 sy 171 74hctl
    Text: Z v tr e ZXS4HCTLS ZX74HCTLS x 6 4 z x k h c t ls 6 4 3 Octal Bus Transceivers February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These high-speed octal bus transceivers are designed


    OCR Scan     		PDF ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74HCTLS diode sy 171 sy 171 74hctl

    74HCTLS

    Abstract: No abstract text available
    Text: Zytrex ZXS4HCTLS ZX74HCTLS Februa ry 1985 74A Dual D-Type Positive-Edge-Triggered Flip-Flops with Preset and Clear OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain two independent positive-edgetriggered D-type flip-flops. Each flip-flop has its own


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: ZX74HCTLS 74HCTLS

    74HCTLS

    Abstract: No abstract text available
    Text: Z v t r e ZXS4HCTLS M M g ZX74HCTLS § x Quad 2-Input NAND Gates with Opert-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain four independent 2-input NAND


    OCR Scan     		PDF 54/74LS 74HCTLS: 54HCTLS: ZX74HCTLS 74HCTLS

    74HCTLS

    Abstract: 1411D
    Text: Zyfrex ZX54HCTLS # # ZX74HCTLS M M February 1985 •» 4-Bit D-Type Registers with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description ■ Gated output control lines for enabling or disabling the outputs These 4-bit registers contain D-type flip-flops with 3-state


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: -556C 74HCTLS 1411D

    74HCTLS

    Abstract: No abstract text available
    Text: h ftr e ZX54HCTLS ZX74HCTLS x § # ZX54HCTLS ZX74HCTLS Dual AND-OR-Invert Gates and Dual AND-OR Gates February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family The '51 performs the following Boolean functions:


    OCR Scan     		PDF 54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74HCTLS

    74hctls

    Abstract: si158
    Text: h flwar ZX54HCTLS ZX74HCTLS February 1985 157 zxm h c tls 158 Quad 2-Line to 1-Line Data Selector/Multiplexers OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These are data selector/multiplexers which select a 4-bit


    OCR Scan     		PDF ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: hctlsi57, hctlsi58 74HCTLS 54HCTLS Ta--55Â si158