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    Y37256V Search Results

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    Y37256V Price and Stock

    Rochester Electronics LLC CY37256VP208-66NC

    IC CPLD 256MC 20NS 208QFP
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    DigiKey CY37256VP208-66NC Bulk 295 12
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    Infineon Technologies AG CY37256VP160-66AXC

    IC CPLD 256MC 20NS 160TQFP
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    Infineon Technologies AG CY37256VP208-66NXC

    IC CPLD 256MC 20NS 208QFP
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    Infineon Technologies AG CY37256VP256-66BBI

    IC CPLD 256MC 20NS 256FBGA
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    Infineon Technologies AG CY37256VP256-66BBC

    IC CPLD 256MC 20NS 256FBGA
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    Y37256V Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY37256

    Abstract: CY37256V tms 4532
    Text: TSm m m tB o v p p r g Q C Y37256V i k v / k.< UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns F e a tu re s — ts = 7.0 ns • 256 m a cro c ells in sixteen logic blocks — tc o = 6.0 ns • 3.3V In-S ystem R eprog ram m ab le™ IS R ™


    OCR Scan     		PDF CY37256V 256-Macrocell CY37256 tms 4532

    Untitled

    Abstract: No abstract text available
    Text: Xgjf PRELIMINARY Y37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns • • • • • • — JTAG-compliant on-board programming


    OCR Scan     		PDF CY37256V 256-Macrocell 160-pin 208-pin 256-lead CY37256, CY37128/37128V, Y37192/37192V, CY37384/37384V, CY37512/37512V

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6149 W CYPRESS Ultra37256V PRELIMINARY UltraLogic TM 256-Macrocell 3.3V ISR CPLD • Up to 192 1/Os — plus 5 dedicated inputs including 4 clock inputs Features • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — 3.3V ISR


    OCR Scan     		PDF Ultra37256V 256-Macrocell IEEE1149 160-pin 208-pin 256-lead Ultra37000

    OL67

    Abstract: CY373
    Text: PRELIMINARY Y37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — t PD = 12 ns Features — ts = 7 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6 .5 ns • • • • • • — JTAG-compliant on-board programming


    OCR Scan     		PDF CY37256V 256-Macrocell OL67 CY373

    CY37256P160-125UMB

    Abstract: CY37256P160-125AI CY37256P160-83UMB CY37256 CERAMIC QUAD FLATPACK CQFP CY37256V
    Text: CY37256 UltraLogic 256-Macrocell ISR™ CPLD — tc o = 4.5 ns Features P ro d uct-term clocking • 256 m a cro c ells in sixteen logic blocks IEEE 1149.1 JTAG b o u n d a ry scan • In-S ystem R ep ro g ra m m ab le ™ IS R ™ P ro g ram m a b le slew rate co n tro l on ind ividu al l/O s


    OCR Scan     		PDF CY37256 256-Macrocell 154MHz 160-pin 208-pin CY37256P160-125UMB CY37256P160-125AI CY37256P160-83UMB CY37256 CERAMIC QUAD FLATPACK CQFP CY37256V

    CY37256

    Abstract: CY37256V
    Text: Y37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD F eatu res — tPD = 12 ns — ts = 7.0 ns • 256 m a cro c ells in sixteen logic blocks — tc o = 6.0 ns • 3.3V In-S ystem R eprog ram m ab le™ IS R ™ • P ro d uct-term clocking — JT A G -co m p liant o n -b o a rd p ro gram m in g


    OCR Scan     		PDF CY37256V 256-Macrocell CY37256 CY37256V

    CY3600

    Abstract: No abstract text available
    Text: fax id: 6149 SS i^K JS f r i s a l i i J F ; U FTV fST “ ¿ N &*• I F l m c b PRELIMINARY Ultra37256V t i UltraLogic 256-Macrocell 3.3V ISR™ CPLD Features • Up to 192 1/Os — plus 5 d ed icated inp u ts including 4 clo ck inputs • 256 m a cro c ells in six te en logic blocks


    OCR Scan     		PDF Ultra37256V 256-Macrocell IEEE1149 CY3600

    Untitled

    Abstract: No abstract text available
    Text: . _ n « PRELIMINARY Ultra37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns • • • • • • — JTAG-compliant on-board programming


    OCR Scan     		PDF Ultra37256V 256-Macrocell 160-pin 208-pin 256-lead Ultra37256, Itra37128/37128V, Itra37192/37192V, Itra37384/37384V, Itra37512/37512V

    Untitled

    Abstract: No abstract text available
    Text: . JMMT f | Y37256V 1^,/ |-.-.y| J«$ UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7.0 ns • 256 macrocells in sixteen logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.0 ns • • • • •


    OCR Scan     		PDF CY37256V 256-Macrocell 160-Pin 208-Pin 256-Lead CY37256, Y37128/37128V, Y37192/37192V, CY37384/37384V, Y37512/37512V

    Untitled

    Abstract: No abstract text available
    Text: fax id: 6149 W CYPRESS Ultra37256V PRELIMINARY UltraLogic TM 256-Macrocell 3.3V ISR CPLD • Up to 192 1/Os — plus 5 dedicated inputs including 4 clock inputs Features • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — 3.3V ISR


    OCR Scan     		PDF Ultra37256V 256-Macrocell IEEE1149 160-pin 208-pin 256-lead Ultra37000

    37256VP160

    Abstract: CY3600 601-25-A
    Text: fax id: 6149 S S r i s i ^ K a JS f l i i J F F T V f S T “ ¿ N &*• ; U I F l m c b PRELIMINARY Ultra37256V t i UltraLogic 256-Macrocell 3.3V ISR™ CPLD Features • Up to 192 1/Os — plus 5 d ed icated inp u ts including 4 clo ck inputs • 256 m a cro c ells in six te en logic blocks


    OCR Scan     		PDF Ultra37256V 256-Macrocell IEEE1149 37256VP160 CY3600 601-25-A