XC95288
Abstract: No abstract text available
Text: flXIU N X XC95286 In-System Programmable CPLD October 28, 1997 Version 2.0 Preliminary Product Specification Features MC h p (1.7) + MC lp (0.9) + MC (0.006 m A/M Hz) f • 15 ns pin-to-pin logic delays on all pins Where: • • • • fcNT to MHz 288 macrocells with 6,400 usable gates
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OCR Scan
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PDF
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XC95286
36V18
boundary-scaE15,
XC95288
HQ208
208-Pin
BG352
352-Pin
XC95288
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Untitled
Abstract: No abstract text available
Text: flX IU N X XC95286 In-System Programmable CPLD November 12, 1997 Version 2.0 Preliminary Product Specification Features MC h p (1.7) + MC lp (0.9) + MC (0.006 m A/M Hz) f • 15 ns pin-to-pin logic delays on all pins Where: • • • • fcNT to MHz 288 macrocells with 6,400 usable gates
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OCR Scan
|
PDF
|
XC95286
36V18
XC95288
HQ208
208-Pin
BG352
352-Pin
XC95288
|