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Abracon Corporation ASGTX-C-52.000MHZ-1-T XTAL OSC VCTCXO 52.0000MHZ LVCMO
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Abracon Corporation ASGTX-C-52.000MHZ-2-T XTAL OSC VCTCXO 52.0000MHZ LVCMO
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Abracon Corporation ASGTX-C-52.000MHZ-1 Controlled Oscillator 52MHz TCXO/VC-TCXO LVCMOS 6-Pin SMD Bulk - Bulk (Alt: ASGTX-C-52.000MHZ-1)
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Abracon Corporation ASGTX-C-52.000MHZ-2 Controlled Oscillator 52MHz TCXO/VC-TCXO LVCMOS 6-Pin SMD Bulk - Bulk (Alt: ASGTX-C-52.000MHZ-2)
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Abracon Corporation ASGTX-C-52.000MHZ-2-T2 Controlled Oscillator 52MHz TCXO/VC-TCXO LVCMOS 6-Pin SMD T/R - Tape and Reel (Alt: ASGTX-C-52.000MHZ-2-T2)
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Avnet Americas	ASGTX-C-52.000MHZ-2-T2	Reel			250	1 - 10 - 100 - 1000 - 10000 -	Get Quote
RS	ASGTX-C-52.000MHZ-2-T2	Bulk			250	1 - 10 - 100 - 1000 $50.87 10000 $45.79	Get Quote

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XC5200 Datasheets (76)

Part	Manufacturer	Description	Datasheet Type	PDF
XC5200	Xilinx	The Programmable Logic Data Book	Original	PDF
XC5200	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3BG225C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3BG352C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3HQ208C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3HQ240C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PC84C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PG156C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PG191C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PG223C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PG299C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PQ100C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PQ160C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3PQ208C	Xilinx	Field Programmable Gate Arrays	Original	PDF

XC5200-3PQ240C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3TQ144C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3TQ176C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3VQ100C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-3VQ64C	Xilinx	Field Programmable Gate Arrays	Original	PDF
XC5200-4BG225C	Xilinx	Field Programmable Gate Arrays	Original	PDF

XC5200 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
DECODE16 Abstract: HB 00173 XC4000 XC5200 LD16CE DECODE32 X4977 Text: Technical Data R XC5200 Libraries Guide Supplement Preliminary v2.0 • May 1995 XACT XC5200 Libraries Guide The Xilinx logo and XACT are registered trademarks of Xilinx, Inc. All XC-prefix product designations are trademarks of Xilinx. The Programmable Logic Company and The	Original	XC5200 XC5200 DECODE16 HB 00173 XC4000 LD16CE DECODE32 X4977	PDF
XC4000XL Abstract: XC4002XL XC5200 XC3000 XC3020 XC4000 multiple FPGA bitstream Text: APPLICATION NOTE APPLICATION NOTE Xilinx FPGAs: A Technical Overview for the First-Time User  XAPP 097 July 9, 1998 Version 1.2 13* Introduction In the Spartan , XC3000, XC4000, and XC5200 device families, Xilinx offers several evolutionary and compatible	Original	XC3000, XC4000, XC5200 XC4000and XC5200-family XC4000XL XC4002XL XC3000 XC3020 XC4000 multiple FPGA bitstream	PDF
xc5202pc84 Abstract: XC5202-PC84 XC4003APC84 XC4010PC84 XC5204PC84 XC4003PC84 xc5210pc84 XC5204-PC84 XC5210PC XC4005PC84 Text: 84-Pin PLCC XC4000/XC5200 Common Footprint A16 O A17(O) GND 12 GCK1 13 TMS(I) I/O 9 8 7 6 5 4 3 AAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAA AAAA AAAAAAAAAAAAAA AA AA AAAA AA AAAAAAAA AAAAAAAA AAAAAA AAAA AAAA AAAA AA AAAAAAAA AAAAAAAA AAAAAA AAAA AAAA AAAAAAAA	Original	84-Pin XC4000/XC5200 XC4000 XC5200 xc5202pc84 XC5202-PC84 XC4003APC84 XC4010PC84 XC5204PC84 XC4003PC84 xc5210pc84 XC5204-PC84 XC5210PC XC4005PC84	PDF
TQ144 Abstract: XC5204 matrix 8x8 PQ100 PQ160 XC5200 XC5210 VersaBLOCK PC84 VQ100 Text: XC5200 FPGA Family Grows T he XC5200 FPGA family has been expanded to include the 2,500-gate XC5202 and the 4,000-gate XC5204. The XC5200 family now includes flexible, high-density FPGA devices ranging from 2,500 to 18,000 gates. For lower-density designs that do not	Original	XC5200 500-gate XC5202 000-gate XC5204. XC5204 TQ144 matrix 8x8 PQ100 PQ160 XC5210 VersaBLOCK PC84 VQ100	PDF
XC6200 Abstract: XC3000A XC3100A XC4000 XC4000E XC5000 XC5200 XC7300 XC8100 XC7000 Text: New Product Families New Product Families — 1 Copyright 1995 by Xilinx, Inc. All rights reserved. All trademarks are the property of the respective owners. New Product Families Agenda • XC5200 - New, cost-optimized, high-volume production solution ■	Original	XC5200 XC8100 XC6200 XC3100A XC4000E XC7300 XC3000A XC4000 XC5200 XC3000A XC3100A XC4000 XC5000 XC7300 XC7000	PDF
XC5200 Abstract: XC3100A XC4000 XC5202 XC5204 XC5206 XC5210 XC5215 XC8100 XC5200 Family Text: XC5200 Family Now In Volume A 22 ll XC5200 family devices and the supporting XACTstepTM design software are now in volume production. With five devices — ranging from 2,000 to 18,000 usable gates — offered in 15 different packages, there are now more than 100	Original	XC5200 XC4000 XC8100 100-percent XC3100A XC5202 XC5204 XC5206 XC5210 XC5215 XC5200 Family	PDF
Untitled Abstract: No abstract text available Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)	Original	XC5200 dedicated24 PQ160 TQ176 PG191 HQ208 PQ208 PG223 BG225 HQ240	PDF
XC1728 Abstract: xc17256 XC2000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215 Text: Technical Data R XC5200 Logic Cell Array Family Preliminary v1.0 • April 1995 R and XACT are registered trademarks of Xilinx. All XCprefix product designations, XACT-Performance, X-BLOX, XChecker, XDM, LCA, Logic Cell, Express, VersaBlock, and VersaRing are	Original	XC5200 PQ160 PG191 PQ208 PG223 PQ240 XC5206 XC5210 XC1728 xc17256 XC2000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215	PDF
X9009 Abstract: r13-112 switch XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 X-9009 XC5215 Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)	Original	XC5200 PQ160 TQ176 PG191 HQ208 PQ208 PG223 BG225 HQ240 PQ240 X9009 r13-112 switch XC3000 XC4000 XC5202 XC5204 XC5206 X-9009 XC5215	PDF
UPD 552 C Abstract: LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 Text: XC5200 Field Programmable Gate Arrays  June 1, 1996 Version 4.0 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed	Original	XC5200 PQ100 VQ100 XC5202 XC5204 XC5206 XC5210 XC5215 TQ144 PG156 UPD 552 C LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210	PDF
XC5200 Abstract: XC5200L Text: s XC5200L Field Programmable Gate Arrays  June 1, 1996 Version 1.0 Advance Product Specification Features • • • • • • • • • • • High-density family of Field-Programmable Gate Arrays (FPGAs) JEDEC-compliant 3.3 V version of XC5200 FPGA	Original	XC5200L XC5200 XC5200L	PDF
XC2000 Abstract: XC2018 PC84 XILINX XC2000 XC2018 XC3000 xc5200 xc3000 xact XC3000A XC3100 XC3100A Text: APPLICATION NOTE  XAPP 061 September 23, 1997 Version 2.1 Design Migration from XC2000/ XC3000 to XC5200 Application Note by Marc Baker Summary The XC5200 delivers the most cost-effective solution for high-density, reprogrammable logic designs not requiring the	Original	XC2000/ XC3000 XC5200 XC5200 XC4000 XC3100A XC2000/XC3000 XC2000 XC2018 PC84 XILINX XC2000 XC2018 xc3000 xact XC3000A XC3100	PDF
XC2000 Abstract: XC2018 PC84 XILINX XC2000 XC2000 FPGAs XC3000 XC5200 XILINX xc2018 XC3000A XC3100 XC3100A Text: APPLICATION NOTE  XAPP 061 September 23, 1997 Version 2.1 Design Migration from XC2000/ XC3000 to XC5200 Application Note by Marc Baker Summary The XC5200 delivers the most cost-effective solution for high-density, reprogrammable logic designs not requiring the	Original	XC2000/ XC3000 XC5200 XC5200 XC4000 XC3100A XC2000/XC3000 XC2000 XC2018 PC84 XILINX XC2000 XC2000 FPGAs XILINX xc2018 XC3000A XC3100	PDF
XAPP017 Abstract: XC4000 XC5200 XC5202-PC84 xc5202pc84 Text: APPLICATION NOTE 1 Boundary Scan in XC4000 and XC5200 Series Devices  XAPP017 December 10, 1997 Version 2.1 1 13* Application Note Summary XC4000 and XC5200 Series FPGA devices contain boundary-scan facilities that are compatible with IEEE Standard 1149.1.	Original	XC4000 XC5200 XAPP017 XC5200 cspress/catalog/st01096 XC5202-PC84 xc5202pc84	PDF

LC1 D12 P7 Abstract: XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215 Text: XC5200 Field Programmable Gate Arrays  August 6, 1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed	Original	XC5200 PQ100 VQ100 XC5202 XC5204 XC5206 XC5210 XC5215 TQ144 PG156 LC1 D12 P7 XC2000 XC3000 XC4000 XC5200 XC5202 XC5204 XC5206 XC5210 XC5215	PDF
XC5202-PC84 Abstract: XAPP017 XC4000XLA XC5202PC84 XC4000XV XC5200 XC4000 XC4000X X5999 Text: Application Note: XC4000, Spartan , and XC5200 R XAPP017 v3.0 November 16, 1999 Boundary-scan in XC4000, Spartan™ and XC5200 Series Devices Application Note Summary XC4000, Spartan and XC5200 series FPGA devices contain boundary-scan facilities that are	Original	XC4000, XC5200 XAPP017 XC5200 XC5202-PC84 XAPP017 XC4000XLA XC5202PC84 XC4000XV XC4000 XC4000X X5999	PDF
XC5200 Abstract: 3100r Text: Chapter 12 TRACE This program is compatible with the following families. • XC3000A/L • XC3100A/L • XC4000E/L • XC4000EX/XL/XV/XLA • XC5200 • Spartan • SpartanXL • Virtex This chapter describes TRACE . The chapter contains the following sections.	Original	XC3000A/L XC3100A/L XC4000E/L XC4000EX/XL/XV/XLA XC5200 383MHz) XC5200 3100r	PDF
XC4005 Abstract: xilinx xc5204 XC4002A XC4003A XC4004A XC4005A Text: 84-Pin PLCC XC4000/XC5200 Common Footprint A16 O A17(O) GND 12 GCK1 13 TMS(I) I/O 9 8 7 6 5 4 3 AAAAAAAAAAAAAA AAAAAAAA AAAAAAAA AAAAAA AAAA AAAAAAAAAAAAAA AA AA AAAA AA AAAAAAAA AAAAAAAA AAAAAA AAAA AAAA AAAA AA AAAAAAAA AAAAAAAA AAAAAA AAAA AAAA AAAAAAAA	Original	84-Pin XC4000/XC5200 XC4000 XC5200 XC4005 xilinx xc5204 XC4002A XC4003A XC4004A XC4005A	PDF
AS 108-120 Abstract: LC1 D12 10 K1882 nec d 882 p datasheet XAPP 138 data XC5200 XC3000 XC4000 XC5202 XC5204 Text: XC5200 Series Field Programmable Gate Arrays R November 5, 1998 Version 5.2 7* Product Specification Features - • Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”)	Original	XC5200 TQ176 PG191 HQ208 PQ208 PG223 BG225 HQ240 PQ240 XC5210-6PQ208C AS 108-120 LC1 D12 10 K1882 nec d 882 p datasheet XAPP 138 data XC3000 XC4000 XC5202 XC5204	PDF
Boundary Scan Logic Abstract: gets XC4000 XC5200 Text: How does the EXTEST instruction work in the XC4000/XC5200 series devices? The XC4000 and XC5200 series devices implement the IEEE 1149.1-compatible EXTEST instruction. Loading a bit sequence “000” in the Boundary Scan Instruction register IR will enable the EXTEST instruction.	Original	XC4000/XC5200 XC4000 XC5200 Boundary Scan Logic gets	PDF
XC5402 Abstract: XC5406 XC5410 Text: f l XILINX XC5400 Hardwire Array Family Preliminary Product Specification Features Description • Mask Programmed version of the XC5200 Field Programmable Gate Array FPGA - Specifically designed for easy XC5200 conversion - Significant cost reduction for high volume	OCR Scan	XC5200 pBG352 BG225 BG352 XC5402 XC5406 XC5410	PDF
GV1 M10 Abstract: TPC842 A7 B14 Text: tlX IU N X XC5200 Field Programmable Gate Arrays August 6,1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTstep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed	OCR Scan	XC5200 -403C XC5202 XC5204 XC5206 XC5210 XC5215 PQ100 VQ100 TQ144 GV1 M10 TPC842 A7 B14	PDF
Untitled Abstract: No abstract text available Text: £ XC5200 Field Programmable Gate Arrays x ilin x August 6,1996 Version 4.01 Preliminary Product Specification Features • Fully supported by XACTsfep Development System - Includes complete support for XACT-Performance™, X-BLOX™, Unified Libraries, Relationally Placed	OCR Scan	XC5200 PQ100 VQ100 TQ144 PG156 XC5202 XC5204 XC5210 XC5215 PQ160	PDF
XCS200 FPGA Abstract: No abstract text available Text: HXILINX XC5200 Series Field Programmable Gate Arrays December 10, 1997 Version 5.0 Product Specification Features • • Low-cost, process-optimized, register/latch rich, SRAM based reprogrammable architecture - 0.5pm three-layer metal CMOS process technology	OCR Scan	XC5200 XC5202 XC5204 XC5206 XC5210 XC5215 PQ100 VQ100 TQ144 PG156 XCS200 FPGA	PDF

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XC5200 Price and Stock

Abracon Corporation ASGTX-C-52.000MHZ-1-T

Abracon Corporation ASGTX-C-52.000MHZ-2-T

Abracon Corporation ASGTX-C-52.000MHZ-1

Abracon Corporation ASGTX-C-52.000MHZ-2

Abracon Corporation ASGTX-C-52.000MHZ-2-T2

XC5200 Datasheets (76)

XC5200 Datasheets Context Search

DECODE16

XC4000XL

xc5202pc84

TQ144

XC6200

XC5200

Untitled

XC1728

X9009

UPD 552 C

XC5200

XC2000

XC2000

XAPP017

LC1 D12 P7

XC5202-PC84

XC5200

XC4005

AS 108-120

Boundary Scan Logic

XC5402

GV1 M10

Untitled

XCS200 FPGA