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Abstract: No abstract text available
Text: V L S I Tech no lo gy , in c . VT20C71 • VT20C72 4,096 x 4 SEPARATE I/O SRAM FEATURES DESCRIPTION • High-speed access and cycle times: 25, 35 ns The VT20C71 and VT20C72 are high-speed static RAMs organized as 4,096 words by 4 bits. They were developed in conjunction with VISIC
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VT20C71
VT20C72
VT20C71
VT20C72
VT20C72)
VT20C71)
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VT20C
Abstract: No abstract text available
Text: V L S I TECHNOLOGY INC 1ÖE D =130034? DD03Q42 □ • T - M - 8 3 -6 8 VLSI T ech n o lo g y , in c . VT20C71 • VT20C72 4,096 x 4 SEPARATE I/O SRAM FEATURES DESCRIPTION • High-speed access and cycle times: 25, 35 ns The VT20C71 and VT20C72 are high-speed static RAMs organized
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DD03Q42
VT20C71
VT20C72
VT20C71
VT20C72
A0-A11)
VT2QC72)
VT20C71)
VT20C
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