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    Opto 22 GRV-IACDCTTL-24

    I/O Modules AC/DC input, 24 channels, 2.0-16 V AC/DC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics GRV-IACDCTTL-24
    • 1 $470.18
    • 10 $448.34
    • 100 $448.34
    • 1000 $448.34
    • 10000 $448.34
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    Phoenix Contact EMG17-OV-TTL/24DC/2

    Solid State Relays - Industrial Mount EMG 17-OV-TTL/ 24DC/
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    TTI EMG17-OV-TTL/24DC/2 Each 1
    • 1 $226.06
    • 10 $209.2
    • 100 $204.31
    • 1000 $204.31
    • 10000 $204.31
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    Phoenix Contact EMG 17-OV-TTL/ 24DC/2

    Power solid-state relay - with LED and protective circuit in input and output circuits - input: TTL 5 V DC - output: short-circuit-proof - 24 V DC/max. 2 A
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Master Electronics EMG 17-OV-TTL/ 24DC/2
    • 1 $225.51
    • 10 $209.71
    • 100 $204.31
    • 1000 $204.31
    • 10000 $204.31
    		Buy Now

    TTL24 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    diode s1 77

    Abstract: S124 diode s1 diode s1 74 socket s1 S1-100 S1-128
    Text: P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 A4 D2 D1 D0 S1-118 S1-110 S1-103 S1-100 TTL1 TTL8 C3 B4 TTL11 C4 TTL13 C5 TTL15 C6 TTL16 C7 TTL17 C8 TTL19 C9 AGND C10 PVCC C11 TTL20 C12 TTL21 C13 TTL22 C14 TTL23 C15 TTL24 C16 TTL25 C17 PVCC C18 TTL26 C19 PVPP C20 TTL28


    Original     		PDF S1-118 S1-110 S1-103 S1-100 S1-122 S1-127 TTL11 TTL13 TTL15 TTL16 diode s1 77 S124 diode s1 diode s1 74 socket s1 S1-100 S1-128

    asynchronous fifo vhdl

    Abstract: 8 BIT ALU design with verilog/vhdl code full subtractor using ic 74138 74139 for bcd to excess 3 code vhdl code for 8bit bcd to seven segment display 32 BIT ALU design with verilog/vhdl code 74594 16 BIT ALU design with verilog/vhdl code B1516 RAM1024
    Text: QuickWorks User Manual with SpDE Reference Release 2009.2.1 Contact Information QuickLogic Corporation 1277 Orleans Drive Sunnyvale, CA 94089 Phone: (408) 990-4000 (US) (905) 940-4149 (Canada) +(44) 1932-57-9011 (Europe) +(852) 2567-5441 (Asia) E-mail: info@quicklogic.com


    Original     		PDF

    JT-G703

    Abstract: No abstract text available
    Text: MRT Device 6-, 8-, 34- Mbit/s Line Interface TXC-02050C DATA SHEET DESCRIPTION • 6312/8448/34368 kbit/s line interface • AGC and equalizer • Line quality monitor 10-6 error rate threshold • Receive loss of signal and transmit loss of clock alarms


    Original     		PDF TXC-02050C 44-pin 844ication. TXC-02050C-MB JT-G703

    diode t25 4 B9

    Abstract: transistor af18 socket s1 diode t25 4 d9
    Text: P1 TTL0 D3 A1 TTL3 A2 TTL6 A3 TTL9 P1 D2 D1 D0 A4 S1-W2 S1-AA4 S1-AD3 S1-AE3 TTL1 P1 D4 B1 TTL4 B2 TTL7 B3 TTL10 B4 AID6 A5 TTL12 B5 AID5 A6 TTL14 B6 AID4 A7 PVCC B7 AID0 A8 +5V B8 AID1 A9 TTL18 B9 AID2 A10 AGND B10 AID3 A11 TTL44 B11 S1-U2 S1-R2 D6 TDI TTL2


    Original     		PDF TTL10 TTL12 TTL14 TTL18 TTL44 TTL19 S1-M24 S1-AD12 S1-D12 TTL17 diode t25 4 B9 transistor af18 socket s1 diode t25 4 d9

    HW-133-PC68

    Abstract: HW-133 S124 socket s1 S1-25 s159 socket s1 a1 a2 61S161 XC7354 MRX TTL-45
    Text: ZONE REV 01 P1 TTL0 TTL3 A2 TTL6 A3 TTL9 A4 AID6 AID5 D3/D0 D2/D4 S1-25 S1-29 S1-28 S1-27 TTL1 B2 TTL7 B3 TTL10 B4 A5 TTL12 B5 A6 TTL14 B6 D1/D3 D0/D2 AID4 A7 PVCC B7 AID0 A8 +5V B8 A9 AID2 AID3 TTL18 B9 A10 AGND B10 A11 TTL44 B11 AID7 A12 AGND B12 AGND A13


    Original     		PDF S1-25 S1-29 S1-28 S1-27 TTL10 TTL12 TTL14 TTL18 TTL44 TTL11 HW-133-PC68 HW-133 S124 socket s1 S1-25 s159 socket s1 a1 a2 61S161 XC7354 MRX TTL-45

    S124

    Abstract: diode s1 85
    Text: P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 A4 D2 D1 D0 S1-57 S1-54 S1-52 S1-51 TTL1 TTL4 B2 TTL7 B3 TTL10 B4 A5 TTL12 B5 AID5 A6 TTL14 B6 AID4 A7 PVCC B7 AID0 A8 PVSP B8 AID1 A9 TTL18 B9 AID2 A10 AGND B10 AID3 A11 TTL44 B11 AID7 A12 AGND B12 AGND A13 AGND B13 CGND


    Original     		PDF S1-57 S1-54 S1-52 S1-51 TTL10 TTL12 TTL14 TTL18 TTL44 SGND/D11 S124 diode s1 85

    HW-133

    Abstract: HW-133-PQ44 S124 XC7354 S1-11 XC7354 MRX TTL-45 aid-1
    Text: ZONE REV 01 P1 TTL0 TTL3 A2 TTL6 A3 TTL9 A4 AID6 INITIAL RELEASE PER DCN #6790 P1 D3 A1 D2 CE D1 (OE) S1-11 S1-14 S1-13 S1-12 TTL1 B1 TTL4 B2 D4 (DATA) S1-16 S1-19 D6 TTL2 C1 TTL5 C2 TTL7 B3 TTL8 C3 B4 TTL11 C4 A5 TTL12 B5 TTL13 C5 AID5 A6 TTL14 B6 TTL15


    Original     		PDF S1-11 S1-14 S1-13 S1-12 S1-16 S1-19 TTL11 TTL12 TTL13 TTL14 HW-133 HW-133-PQ44 S124 XC7354 S1-11 XC7354 MRX TTL-45 aid-1

    socket s1

    Abstract: diode s1 61 diode s1 77 diode s1 85 S124 040 d10 diode s1 diode s1 74 HW-133-PQ160 S1 18
    Text: P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 A4 D2 D1 D0 S1-90 S1-82 S1-79 S1-77 TTL1 TTL4 B2 TTL7 B3 TTL10 B4 A5 TTL12 B5 AID5 A6 TTL14 B6 AID4 A7 PVCC B7 AID0 A8 PVSP B8 AID1 A9 TTL18 B9 AID2 A10 AGND B10 AID3 A11 TTL44 B11 AID7 A12 AGND B12 AGND A13 AGND B13 CGND


    Original     		PDF S1-90 S1-82 S1-79 S1-77 TTL10 TTL12 TTL14 TTL18 TTL44 SGND/D15 socket s1 diode s1 61 diode s1 77 diode s1 85 S124 040 d10 diode s1 diode s1 74 HW-133-PQ160 S1 18

    diode b27

    Abstract: diode b26 TTL20 S124 diode b29 socket s1 53 S1 TTL-45
    Text: ZONE REV 01 DATE REVISION DESCRIPTION INITIAL RELEASE PER DCN #6875 DRAWN 5/23/95 CHECK EWR APPVD CH FE Further Revision history is available on Matrix. P1 TTL0 A1 TTL3 A2 TTL6 A3 TTL9 A4 AID6 P1 D3 D2 D1 S1-7 S1-8 S1-9 S1-10 TTL1 P1 D4 B1 TTL4 B2 S1-63 S1-61


    Original     		PDF S1-10 S1-63 S1-61 TTL11 TTL12 TTL13 TTL14 TTL15 TTL16 TTL17 diode b27 diode b26 TTL20 S124 diode b29 socket s1 53 S1 TTL-45

    AT070TN94

    Abstract: No abstract text available
    Text: FR1260X_XX is designed to provide Gamma Voltage, AVDD, VGH and VGL for TFT panel modules. As well as convert LVDS signal into TTL signal or just bypass TTL signals from the output of SBC single board computer to panel immediately. The FR1260x_xx does not manage scaling up/down function for the image input.


    Original     		PDF FR1260X ZIF60p-0 AUO-A070VW04-V4, AUO-A080SN01-V5, AUO-A104SN03-V1. ZIF50p-0 FR1260T-1) 50pin FR1260T-5) AT070TN94

    full subtractor circuit using xor and nand gates

    Abstract: 74138 full subtractor 3-input-XOR 74138 decoder 7474 D flip-flop vhdl code for 8-bit BCD adder data sheet 74139 vhdl code for 8 bit ODD parity generator 74171 74594
    Text: Chapter 10 - Macro Library Reference Chapter 10: The Macro Library The QuickLogic Macro Library contains over 475 macros and macro building blocks. While these macros offer a wide range of functions and flexibility, they fall into familiar functional groups. The naming conventions employed in the library are easy


    Original     		PDF

    TXC-02054

    Abstract: E2 hdb3 TXC-02054-MB uses of 0.1 MICROFARAD ceramic disk TXC-02054AIPL HDB3 nrz e2 1N4148 1N914 74ACT11244 PE-65966
    Text: MRTE Device 8-, 34- Mbit/s Line Interface TXC-02054 FEATURES DESCRIPTION • 8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit E2/E3 MRTE Line Interface is a CMOS VLSI device that provides the functions needed for terminating two ITU-T


    Original     		PDF TXC-02054 TXC-02054-MB TXC-02054 E2 hdb3 TXC-02054-MB uses of 0.1 MICROFARAD ceramic disk TXC-02054AIPL HDB3 nrz e2 1N4148 1N914 74ACT11244 PE-65966

    TXC-21055

    Abstract: E2 hdb3 1N4148 1N914 IN4148 IN914 TXC-02050 nom401
    Text: MRT Device 6-, 8-, 34-Mbit/s Line Interface TXC-02050 DATA SHEET FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT device is a CMOS VLSI device that provides the functions needed for terminating two CCITT line rates, 8448


    Original     		PDF 34-Mbit/s TXC-02050 TXC-02050-MB TXC-21055 E2 hdb3 1N4148 1N914 IN4148 IN914 TXC-02050 nom401

    TXC-21055

    Abstract: 1N4148 1N914 IN4148 IN914 TXC-02050 8448-kbit txc 24.5 G753
    Text: MRT Device 6-, 8-, 34-Mbit/s Line Interface TXC-02050 DATA SHEET FEATURES DESCRIPTION • 6312/8448/34368 kbit/s line interface The TranSwitch Multi-rate Receive/Transmit MRT device is a CMOS VLSI device that provides the functions needed for terminating two CCITT line rates, 8448


    Original     		PDF 34-Mbit/s TXC-02050 TXC-02050-MB TXC-21055 1N4148 1N914 IN4148 IN914 TXC-02050 8448-kbit txc 24.5 G753

    CS 5211

    Abstract: XC1704 U2A18 A1529 ALI M16 ID99 b21 a03 aO d07 S234 TTL-45
    Text: A [00:1B] P1 P1 P1 S1-37 AOO TTLO A1 TTL3 A2 51-5 TMS 52-11 CEO TTL1 B1 DV TTL4 B2 D05 D02 51-21 TTL7 B3 5 2- 27 TTL10 B4 A5 51-40 TTL12 B5 AID5 A6 52-2 T T L14 B6 AID4 A7 PVCC B7 AIDO A8 +5V B8 TTL6 A3 TTL9 A4 AID6 AID1 DATA DO See note 5. A9 A 10 AID3 A ll


    OCR Scan     		PDF S2-12 S2-24 S2-34 TTL10 TTL12 TTL14 TTL18 TTL44 TTL27 TTL29 CS 5211 XC1704 U2A18 A1529 ALI M16 ID99 b21 a03 aO d07 S234 TTL-45

    MI b11

    Abstract: A241 ISA-96 TTL-45
    Text: TTLO TTL3 T TL6 T TL9 AID6 P1 P1 P1 DATA2 A1 DATAI A2 CEO A3 DATAD A4 S I —6 TTL1 S I —16 TTL4 51—13 TTL7 51-1 TTL10 A5 TTL12 TTL2 C1 DATA4 S I —14- TTL5 C2 DATA6 B3 TTL8 C3 B4 TTL11 C4 B2 A6 TTL14 B6 AID4 A7 PVCC B7 AIDO A8 +5V B8 AID1 A9 TTL18 B9


    OCR Scan     		PDF TTL10 TTL12 TTL14 TTL18 TTL44 TTL27' TTL29 TTL31 TTL33' TTL36 MI b11 A241 ISA-96 TTL-45

    Untitled

    Abstract: No abstract text available
    Text: MRT Device X co u w 6-, 8-, 34-Mbit/s Line Interface TXC-02050 DATA SHEET FEATURES DESCRIPTION ' = = The TranSwitch Multi-rate Receive/Transmit MRT device is a CMOS VLSI device that provides the func­ tions needed for terminating two CCITT line rates, 8448


    OCR Scan     		PDF 34-Mbit/s TXC-02050 TXC-02050-MB

    SSFXLDM-TTL-50G

    Abstract: SSFXLDM-TTL-90T
    Text: ta□ E D ENGINEERED • 3333203 Q0Q07ÛS TL3 EGC COMPONENTS C C O M P A T IB L E -TAP O G IC MODULE T2L input and outputs Delays stable and precise 14-pin Space Saver package Leads - thru-hole, J, Gull Wing or Tucked # Available in delays from 15 to 1000ns


    OCR Scan     		PDF Q0Q07Ã 14-pin 1000ns SSFXLDM-TTL-900 SSFXLDM-TTL-1000 C/123092 SSFXLDM-TTL-50G SSFXLDM-TTL-90T

    Socket S1g1

    Abstract: HW-133 XC95144XL S1A13 TTL32 s1d1 TTL-45 s1n6 S1-N13
    Text: A1 D3 TTL3 A2 _D2_ T TL6 A3 T TL9 A4 TTLO AID6 AID5 51—A 1 P1 P1 TTL1 S1-M 13 TTL4 51—NI Z TTL7 S1-H11 TTL10 GND TTL12 A6 TTL14 B1 B6 TCK VCC A8 +5V B8 AID1 A9 TTL18 B9 AID7 A ll TTL44 A 12 AGND A 13 CGND A14 AGND MOUNTI NG HOLES B12 B16 S1-E11 B17 AGND


    OCR Scan     		PDF S1-K13 S1-M13 51-N1Z 51-G13 S1-C10 TTL10 TTL12 TTL14 TTL18 TTL44 Socket S1g1 HW-133 XC95144XL S1A13 TTL32 s1d1 TTL-45 s1n6 S1-N13

    si111

    Abstract: SI-111 S1-V11 S1L-10 HW-133 Socket S1g4 S1B14 TTL-45
    Text: P1 TTLO TTL3 TTL6 TTL9 AID6 AID5 AID4 AIDO AID1 AID2 AID3 AID7 AGND CGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND PVPP P1 A1 A2 A3 A4 A5 A6 A7 A8 A9 _ Q i_ S 1 -P 2 0 J22_ S 1 -V 2 0 D1 S 1 -Y 2 0 J2Ù _ S 1 -Y 1 9


    OCR Scan     		PDF S1-P20 S1-V20 S1-Y20 S1-Y19 S1-W10 S1-Y10 S1-Y14 S1-V15 S1-U18 S1-R19 si111 SI-111 S1-V11 S1L-10 HW-133 Socket S1g4 S1B14 TTL-45

    3416C

    Abstract: No abstract text available
    Text: M R T Devi ce 6-, 8-, 34-Mbit/s Line Interface TXC-02050 DATA SH EE T FE ATURES ^ DESCRIPTION • 6312/8448/34368 kbit/s line interface - The TranSwitch Multi-rate Receive/Transmit MRT device is a CMOS VLSI device that provides the func­ tions needed for terminating two CCITT line rates, 8448


    OCR Scan     		PDF 34-Mbit/s TXC-02050 TXC-02050-M 3416C

    XC95108XL

    Abstract: si122 ISA-96 HW-133 RH A4 130 XC95144XL IS9B TTL-45 SI-122
    Text: P1 P1 TTLO TTL3 TTL6 TTL9 AID6 AID5 _Q3_ A1 A2 A3 A4 5 1-B O _Q2_ 5 1 -7 4 DI 5 1 -7 1 _BD_ S I— 69 TT L1 TTL4 TTL7 TTL10 GND A5 TTL12 A6 TTL14 P1 5 1 -8 2 TTL2 5 1 -8 7 TTL5 C2 B3 TTL8 C3 B4 TTL11 C4 B7 AI DO A8 +5V B8 AID1 A9 TTL18 B9 AID3 AID7 All TTL44


    OCR Scan     		PDF 51-BO TTL10 TTL12 TTL14 TTL18 TTL44 TTL27' TTL29 TTL31 TTL33' XC95108XL si122 ISA-96 HW-133 RH A4 130 XC95144XL IS9B TTL-45 SI-122

    9536XL

    Abstract: HW-133 HW-133-VQ64 A2 5160 64-pin VQFP xc9572xl TTL-45 ISA-96
    Text: A1 D3ÍA11 A2 D2 A1D) A3 Dlf A9Ì TTL9 A4 DO(AB) AID6 A5 TTLO TTL3 TTL6 P1 P1 P1 S I—24S1-22 GND B2 D6(D1) S1-35 TTL5 C2 B3 TTL8 C3 TTL10 B4 TTL11 C4 TTL12 B5 TTL13 C5 TTL15 C6 TTL16 C7 T TL7 S I—19 D4ÍA12) TTL2 T T L4 S1-20 B1 S1-25 TTL1 AID5 A6 TTL14


    OCR Scan     		PDF S1-Z4-S1-22 S1-20 TTL10 TTL12 TTL14 TTL18 TTL44 TTL27 TTL29 TTL31 9536XL HW-133 HW-133-VQ64 A2 5160 64-pin VQFP xc9572xl TTL-45 ISA-96

    ttl74

    Abstract: TTL138 TTL74 series 2-input OR gate 7400 family TTL373 TTL06 TTL244 ttl273 QL16X24 marking code JRW
    Text: tu« i 1WI pASIC m 1 FAMILY V iaL ink T echnology V ery H igh S peed CMOS FPGAs PRELIMINARY DA TA FAMILY HIGHLIGHTS M ay 1991 Very High Speed - ViaLink™ Metal-to-metal programmable-via antifuse technology, ensures count«' speeds over 100 MHz, and logic


    OCR Scan     		PDF 16-bit ttl74 TTL138 TTL74 series 2-input OR gate 7400 family TTL373 TTL06 TTL244 ttl273 QL16X24 marking code JRW