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    74AC11157

    Abstract: D2957 54AC11157
    Text: 54AC11157, 74AC11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS TI0107— D2957, JU LY 1989— REVISED MARCH 1990 • Buffered Inputs and Outputs S4AC11157 . . . J PACKAGE 74AC11157 . . . DW OR N PACKAGE Flow-Through Architecture to Optimize PCB


    OCR Scan     		PDF 54AC11157, 74AC11157 TI0107â 500-mA 300-mil 54AC11157 74AC11157 D2957 54AC11157

    B1A16

    Abstract: No abstract text available
    Text: S4AC11157, 74AC11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS TI0107—D2957, JULY 1989— REVISED MARCH 1990 54AC11157 . . . J PACKAGE 74AC11157 DW OR N PACKAGE • Buffered Inputs and Outputs Flow-Through Architecture to Optimize PCB Layout


    OCR Scan     		PDF S4AC11157, 74AC11157 TI0107--D2957, 500-mA 300-mil 54AC11157 74AC11157 13C11157, TI0107-- B1A16

    74AC11873

    Abstract: No abstract text available
    Text: TEXAS INSTR LOGIC 31E 3> ^ , 1/ 1 2 3 o a a ^ a s D a 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS ,v , 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture to Optimize PCB Layout 7 _T10167— D3398, MARCH 1990


    OCR Scan     		PDF 54AC11873, 74AC11873 T10167â D3398, S4AC11873 500-mA 300-mil 74AC11873