SN74LV166ADRG4 Search Results

SN74LV166ADRG4 Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
SN74LV166ADRG4		Texas Instruments	SN74LV166 - 8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85		Original	PDF
SN74LV166ADRG4		Texas Instruments	8-Bit Parallel-Load Shift Registers 16-SOIC -40 to 85		Original	PDF

SN74LV166ADRG4 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A
A115-A Abstract: C101 SN54LV166A SN74LV166A Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A
A115-A Abstract: C101 SN54LV166A SN74LV166A Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)
Untitled Abstract: No abstract text available Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion	Original	PDF	SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A)