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    SN74LV08APWTE4 Search Results

    SN74LV08APWTE4 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74LV08APWTE4 Texas Instruments SN74LV08 - Quadruple 2-Input Positive-AND Gates 14-TSSOP -40 to 85 Original PDF
    SN74LV08APWTE4 Texas Instruments OCTAL BUS TRANSCELVERS WITH 3-STATE OUTPUTS Original PDF
    SN74LV08APWTE4 Texas Instruments Quadruple 2-Input Positive-AND Gates 14-TSSOP -40 to 85 Original PDF

    SN74LV08APWTE4 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A SN74LV08A

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K SN54LV08A SN74LAmplifiers A115-A C101 LV08A SN54LV08A SN74LV08A

    LV08A

    Abstract: 74LV08A A115-A C101 SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K SN54LV08A SN74L LV08A 74LV08A A115-A C101 SN54LV08A SN74LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L

    LV08A

    Abstract: A115-A C101 SN54LV08A SN74LV08A SN74LV08ARGYR 74LV08a
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L LV08A A115-A C101 SN54LV08A SN74LV08A SN74LV08ARGYR 74LV08a

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A)

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K SN54LV08A SN74Ltrollers A115-A C101 LV08A SN54LV08A SN74LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K SN54LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce SN54LV08A . . . J OR W PACKAGE SN74LV08A . . . D, DB, DGV, NS,


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A

    lv08a

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) lv08a

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K 000-V A114-A) A115-A) SN54LV08A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A)

    SN74LV08APWR

    Abstract: No abstract text available
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS387L − SEPTEMBER 1997 − REVISED OCTOBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce D Ioff Supports Partial-Power-Down Mode D D <0.8 V at VCC = 3.3 V, TA = 25°C


    Original     		PDF SN54LV08A, SN74LV08A SCLS387L 000-V A114-A) A115-A) SN74LV08APWR

    A115-A

    Abstract: C101 LV08A SN54LV08A SN74LV08A
    Text: SN54LV08A, SN74LV08A QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS387K − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP Output Ground Bounce 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y


    Original     		PDF SN54LV08A, SN74LV08A SCLS387K SN54LV08A SN74Lplifiers A115-A C101 LV08A SN54LV08A SN74LV08A