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    SN54LV139A Search Results

    SN54LV139A Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Type PDF
    SN54LV139A Texas Instruments DUAL 2-LINE TO 4-LINE DECODERS-DEMULTIPLEXERS Original PDF
    SN54LV139AFK Texas Instruments DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS Original PDF
    SN54LV139AJ Texas Instruments DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS Original PDF
    SN54LV139AW Texas Instruments DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS Original PDF

    SN54LV139A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    A115-A

    Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 SN54LV139A . . . J OR W PACKAGE SN74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE


    Original     		PDF SN54LV139A, SN74LV139A SCLS396F SN54LV139A A115-A C101 SN54LV139A SN74LV139A SN74LV139ARGYR

    A115-A

    Abstract: C101 SN54LV139A SN74LV139A 74LV139A
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396C – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Designed Specifically for High-Speed Memory Decoders and Data-Transmission


    Original     		PDF SN54LV139A, SN74LV139A SCLS396C 000-V A114-A) A115-A) SN54LV139A 12tion A115-A C101 SN54LV139A SN74LV139A 74LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396 – APRIL 1998 D D D description The ’LV139A devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation. These devices are designed for highperformance memory-decoding or data-routing


    Original     		PDF SN54LV139A, SN74LV139A SCLS396 SN54LV139A SN74LV139A

    A115-A

    Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I SN54LV139A A115-A C101 SN54LV139A SN74LV139A SN74LV139ARGYR

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 SN54LV139A . . . J OR W PACKAGE SN74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE


    Original     		PDF SN54LV139A, SN74LV139A SCLS396F 000-V A114-A) A115-A) LV139A

    LV139A

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396F – APRIL 1998 – REVISED OCTOBER 2002 SN54LV139A . . . J OR W PACKAGE SN74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE


    Original     		PDF SN54LV139A, SN74LV139A SCLS396F 000-V A114-A) A115-A) LV139A SN74LV139APWR SN74LV139ARGYR

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396G – APRIL 1998 – REVISED JULY 2003 SN54LV139A . . . J OR W PACKAGE SN74LV139A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 SN54LV139A . . . FK PACKAGE


    Original     		PDF SN54LV139A, SN74LV139A SCLS396G SN54LV139A

    SN74LV139A

    Abstract: SN54LV139A
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396B – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports


    Original     		PDF SN54LV139A, SN74LV139A SCLS396B MIL-STD-883, SN74LV139A SN54LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A SN74LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    A115-A

    Abstract: C101 SN54LV139A SN74LV139A 74LV139A
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396C – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Designed Specifically for High-Speed Memory Decoders and Data-Transmission


    Original     		PDF SN54LV139A, SN74LV139A SCLS396C 000-V A114-A) A115-A) SN54LV139A SSYZ010L A115-A C101 SN54LV139A SN74LV139A 74LV139A

    A115-A

    Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I SN54LV139A A115-A C101 SN54LV139A SN74LV139A SN74LV139ARGYR

    A115-A

    Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I SN54LV139A A115-A C101 SN54LV139A SN74LV139A SN74LV139ARGYR

    A115-A

    Abstract: C101 SN54LV139A SN74LV139A SN74LV139ARGYR
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I SN54LV139A A115-A C101 SN54LV139A SN74LV139A SN74LV139ARGYR

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    SN54LV139A

    Abstract: SN74LV139A LV139
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396A – APRIL 1998 – REVISED OCTOBER 1998 D D D D description The ’LV139A devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation. SN54LV139A . . . J OR W PACKAGE


    Original     		PDF SN54LV139A, SN74LV139A SCLS396A LV139A SN54LV139A SN54LV139A SN74LV139A LV139

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS396B – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports


    Original     		PDF SN54LV139A, SN74LV139A SCLS396B MIL-STD-883, F2000 SN74LV139AD SN74LV139ADBR SN74LV139ADGVR SN74LV139ADR SN74LV139APWR

    Untitled

    Abstract: No abstract text available
    Text: SN54LV139A, SN74LV139A DUAL 2ĆLINE TO 4ĆLINE DECODERS/DEMULTIPLEXERS SCLS396I − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Designed Specifically for High-Speed


    Original     		PDF SN54LV139A, SN74LV139A SCLS396I 000-V A114-A) A115-A) LV139A