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74s474 Abstract: 74IS08 s474 74LS165 ic PIN DIAGRAM Text: g M O T O R O L A SN5474LS1S5 DESCRIPTION — The SN54LS/74LS165 Is an 8-bit parallel load or serial-in register with complementary outputs available from the last stage. Parallel inputing occurs asynchronousiy when the Parallel Load (PL) input is LOW.With PLHIGH, serial shifting occurs on the rising edge	OCR Scan	PDF	SN54LS/74LS165 74s474 74IS08 s474 74LS165 ic PIN DIAGRAM

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74s474

Abstract: 74IS08 s474 74LS165 ic PIN DIAGRAM
Text: g M O T O R O L A SN5474LS1S5 DESCRIPTION — The SN54LS/74LS165 Is an 8-bit parallel load or serial-in register with complementary outputs available from the last stage. Parallel inputing occurs asynchronousiy when the Parallel Load (PL) input is LOW.With PLHIGH, serial shifting occurs on the rising edge

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SN54LS/74LS165 74s474 74IS08 s474 74LS165 ic PIN DIAGRAM